公开(公告)号：US5266952A

公开(公告)日：1993-11-30

申请号：US860528

申请日：1992-03-30

Applicant: Wade J. Stone ,  Howard S. Nussbaum ,  Kikuo Ichiroku ,  Benjamin Felder ,  William P. Posey

Inventor： Wade J. Stone ,  Howard S. Nussbaum ,  Kikuo Ichiroku ,  Benjamin Felder ,  William P. Posey

IPC: H03M1/08 ,  H03M1/10 ,  H03M1/20 ,  H03M1/40 ,  H03M3/02 ,  H03M1/12 ,  H03M3/04

CPC classification number: H03M1/208 ,  H03M1/1028

Abstract: A linear predictive ADC employs a fully feed forward design to extend its dynamic range, allow greater speed of operation, achieve stable operation and eliminate a requirement for sample-and-hold circuits. A first quantizer (Qc) converts an input analog signal to a digital format, while a signal predictor (32) predicts a subsequent value of the input signal. After conversion back to analog format, the predicted signal is compared with the actual subsequent value of the input signal to produce an error signal that is converted to a digital format by a second quantizer (Qf). The digital predicted signal is fed forward and combined with the digital error signal to produce a high precision digital output. The analog error signal is preferably amplified prior to digitation to take advantage of the full bit capacity of the second quanitzer (Qf), and then digitally de-amplified back to its original scale. Digital gain and offset adjustment mechanisms (44, 50) are preferably provided to compensate for amplification/de-amplification mismatches and system offsets. The quantizers (Qc, Qf), predictor (32) and a digital register (36) that interfaces between the predictor and the output combiner (46) are clocked in a set sequence to ensure that the predicted signal from the register (36) corresponds in time to the error signal presented to the output combiner (46).

Abstract translation: 线性预测ADC采用完全前馈设计来扩展其动态范围，允许更高的运行速度，实现稳定的运行，并且不需要采样和保持电路。 第一量化器（Qc）将输入模拟信号转换为数字格式，而信号预测器（32）预测输入信号的后续值。 在转换回模拟格式之后，将预测信号与输入信号的实际后续值进行比较，以产生由第二量化器（Qf）转换为数字格式的误差信号。 数字预测信号向前馈送并与数字误差信号组合以产生高精度数字输出。 模拟误差信号优选在数字化之前被放大，以利用第二quanitzer（Qf）的全部位容量，然后数字地放大回到其原始尺度。 优选地提供数字增益和偏移调整机构（44,50）以补偿放大/解除放大失配和系统偏移。 在预测器和输出组合器（46）之间接口的量化器（Qc，Qf），预测器（32）和数字寄存器（36）以设定序列计时，以确保来自寄存器（36）的预测信号对应 在时间上提供给输出组合器（46）的误差信号。

公开(公告)号：US4918449A

公开(公告)日：1990-04-17

申请号：US310634

申请日：1989-02-13

Applicant: Sing W. Chin

Inventor： Sing W. Chin

IPC: H03M1/14 ,  H03M1/20 ,  H03M1/36

CPC classification number: H03M1/208 ,  H03M1/146 ,  H03M1/365

Abstract: A novel multistep flash analog to digital converter is taught, including a voltage estimator which quickly provides a rough estimate of the analog input signal. This rough estimate is used to select appropriate reference voltage tap points for use in the first flash conversion. This first flash conversion, together with the voltage estimate, provides the most significant bits of the digital output word. A digital to analog converter is used to provide a residual voltage which is then converted by a second operation of the flash converter, thereby providing the least significant bits of the digital output word. In one embodiment, the voltage estimate is performed at the same time that the analog input signal is sampled by the flash converter in preparation for the first flash conversion. Therefore, speed of operation is not degraded by the addition of the voltage estimator.

公开(公告)号：US4792787A

公开(公告)日：1988-12-20

申请号：US10675

申请日：1987-02-04

Applicant: Jeffrey M. Speiser ,  Harper J. Whitehouse ,  William H. McKnight

Inventor： Jeffrey M. Speiser ,  Harper J. Whitehouse ,  William H. McKnight

IPC: H03M1/20 ,  H03M3/04

CPC classification number: H03M1/208

Abstract: Improved dynamic range resolution or accuracy analog to digital conversionses linear prediction. An open loop or feed-forward architecture passes an analog signal to a coarse or orthodox analog-to-digital converter that provides digital signals representing a most significant part of the output signal and offers them as inputs to a digital linear predictor whose digital output signal is reconverted to analog form and fed to an analog adder. An analog delay device may be used to receive the next analog sample and, after the proper delay (if needed), feed it to the adder where the difference between the analog predicted value and the analog signal is determined and passed to a subsequent coarse or orthodox analog to digital converter. A closed loop or feedback configuration receives the analog input signal data as well as a feedback predicted value in analog form and passes the difference to a coarse or orthodox analog to digital converter. A digital delay of the digital signal may be used to insure that the digital summing of prediction and digitized error signals occurs at the appropriate times. The recirculated predicted signal is converted to analog form (unless predicted via analog means) and subtracted from the analog input signal to provide an error signal output digitized to form low order bits that correspond in time with an output of high order bits generated by a digitized prediction signal. This arrangement improves the dynamic range, accuracy, resolution or number of resolvable signal levels in an analog to digital converter.

Abstract translation: 改进的动态范围分辨率或精度模数转换采用线性预测。 开环或前馈架构将模拟信号传递到粗糙或正统的模数转换器，其提供表示输出信号的最重要部分的数字信号，并将其提供给数字线性预测器的输入，数字线性预测器的数字输出信号 被转换为模拟形式并馈送到模拟加法器。 可以使用模拟延迟装置来接收下一个模拟采样，并且在适当的延迟（如果需要之后）将其馈送到加法器，其中模拟预测值和模拟信号之间的差被确定并传递到随后的粗略或 正统模数转换器。 闭环或反馈配置接收模拟输入信号数据以及模拟形式的反馈预测值，并将差值传递给粗略或正统的模数转换器。 可以使用数字信号的数字延迟来确保在适当的时间发生预测和数字化误差信号的数字求和。 再循环的预测信号被转换为模拟形式（除非通过模拟装置预测），并从模拟输入信号中减去，以提供数字化的误差信号输出，以形成与数字化产生的高阶位产生的时间对应的低阶位 预测信号。 这种布置改善了模数转换器中的可分辨信号电平的动态范围，精度，分辨率或数量。

公开(公告)号：US3153142A

公开(公告)日：1964-10-13

申请号：US7986460

申请日：1960-12-30

Applicant: IBM

Inventor： HERBERT HELLERMAN

IPC: H03M1/20 ,  H03M1/46

CPC classification number: H03M1/208 ,  H03M1/46