-
1.
公开(公告)号:US4792787A
公开(公告)日:1988-12-20
申请号:US10675
申请日:1987-02-04
CPC分类号: H03M1/208
摘要: Improved dynamic range resolution or accuracy analog to digital conversionses linear prediction. An open loop or feed-forward architecture passes an analog signal to a coarse or orthodox analog-to-digital converter that provides digital signals representing a most significant part of the output signal and offers them as inputs to a digital linear predictor whose digital output signal is reconverted to analog form and fed to an analog adder. An analog delay device may be used to receive the next analog sample and, after the proper delay (if needed), feed it to the adder where the difference between the analog predicted value and the analog signal is determined and passed to a subsequent coarse or orthodox analog to digital converter. A closed loop or feedback configuration receives the analog input signal data as well as a feedback predicted value in analog form and passes the difference to a coarse or orthodox analog to digital converter. A digital delay of the digital signal may be used to insure that the digital summing of prediction and digitized error signals occurs at the appropriate times. The recirculated predicted signal is converted to analog form (unless predicted via analog means) and subtracted from the analog input signal to provide an error signal output digitized to form low order bits that correspond in time with an output of high order bits generated by a digitized prediction signal. This arrangement improves the dynamic range, accuracy, resolution or number of resolvable signal levels in an analog to digital converter.
摘要翻译: 改进的动态范围分辨率或精度模数转换采用线性预测。 开环或前馈架构将模拟信号传递到粗糙或正统的模数转换器,其提供表示输出信号的最重要部分的数字信号,并将其提供给数字线性预测器的输入,数字线性预测器的数字输出信号 被转换为模拟形式并馈送到模拟加法器。 可以使用模拟延迟装置来接收下一个模拟采样,并且在适当的延迟(如果需要之后)将其馈送到加法器,其中模拟预测值和模拟信号之间的差被确定并传递到随后的粗略或 正统模数转换器。 闭环或反馈配置接收模拟输入信号数据以及模拟形式的反馈预测值,并将差值传递给粗略或正统的模数转换器。 可以使用数字信号的数字延迟来确保在适当的时间发生预测和数字化误差信号的数字求和。 再循环的预测信号被转换为模拟形式(除非通过模拟装置预测),并从模拟输入信号中减去,以提供数字化的误差信号输出,以形成与数字化产生的高阶位产生的时间对应的低阶位 预测信号。 这种布置改善了模数转换器中的可分辨信号电平的动态范围,精度,分辨率或数量。
-
2.
公开(公告)号:US4152772A
公开(公告)日:1979-05-01
申请号:US752641
申请日:1976-12-20
申请人: Jeffrey M. Speiser , James M. Alsup
发明人: Jeffrey M. Speiser , James M. Alsup
CPC分类号: G06G7/1921 , G06G7/195 , G06G7/22 , G06J1/005 , H03H17/0211
摘要: Apparatus for performing a discrete cosine transform of an input signal, table for real-time television image processing, specifically for obtaining an acceptable picture when the number of bits of information available for describing the picture and/or the channel bandwidth are severely limited, comprising: two read-only memories, each containing a predetermined number of +1's and -1's arranged in a predetermined manner; two multipliers, each having an input from one of the read-only memories, and another, joint, input connectable to the input signal which is to be transformed discretely and cosinusoidally; two transversal filters, each having N taps, rather than twice the number (2N-1) of taps in the prior art discrete cosine filters, the input to each filter being the output of one of the multipliers; and a single-pole double-throw switch, which switches position at every shift of the samples through the filter, the output of the transform apparatus being connected to the switch arm, each of the free terminals of the switch being connected to the output of one of the transversal filters.
摘要翻译: 用于执行适合于实时电视图像处理的输入信号的离散余弦变换的装置,具体用于当可用于描述图像和/或信道带宽的信息的比特数被严格限制时获得可接受的图像,包括 :两个只读存储器,每个存储器以预定方式排列预定数量的+ 1和-1; 两个乘法器,每个乘法器具有来自只读存储器中的一个的输入,以及可连接到将被离散地和同构地变换的输入信号的另一个联合输入; 两个横向滤波器,每个滤波器具有N个抽头,而不是现有技术的离散余弦滤波器中的抽头数(2N-1)的两倍,每个滤波器的输入是乘法器之一的输出; 和单刀双掷开关,其通过过滤器在样品的每次移动时切换位置,变换装置的输出连接到开关臂,开关的每个自由端连接到 一个横向滤波器。
-
公开(公告)号:US4267580A
公开(公告)日:1981-05-12
申请号:US1516
申请日:1979-01-08
CPC分类号: G06G7/1907
摘要: A charge-coupled device (CCD) analog and digital correlator comprises identical modules, each of which is a simple analog CCD correlator with digital input and output. Circuits are included:(1) for injecting charges proportional to the voltage sequences s(n) and r(n), where s(n) refers to the input signal, and r(n) relates to a reference signal, against which the input signal is correlated;(2) for non-destructively sensing and tapping each sample s(n) and r(n);(3) for forming the summation s(n)+r(n);(4) and finally for squaring s(n), r(n), and [s(n)+r(n)] in simple, floating gate MOSFET amplifiers. The amplifiers operate in their saturation region, and have outputs proportional to s.sup.2 (n), r.sup.2 (n), and [s(n)+r(n)].sup.2, which are then fed into a differential amplifier to produce s(n)r(n).
摘要翻译: 电荷耦合器件(CCD)模拟和数字相关器包括相同的模块,每个模块是具有数字输入和输出的简单模拟CCD相关器。 电路包括:(1)用于注入与电压序列s(n)和r(n)成比例的电荷,其中s(n)表示输入信号,r(n)与参考信号有关, 输入信号相关; (2)用于对每个样本s(n)和r(n)进行非破坏性检测和抽样; (3)用于形成求和s(n)+ r(n); (4),最后在简单的浮栅MOSFET放大器中平方s(n),r(n)和[s(n)+ r(n)]。 放大器在饱和区域工作,并且具有与s2(n),r2(n)和[s(n)+ r(n)] 2成比例的输出,然后将其馈送到差分放大器以产生s )r(n)。
-
公开(公告)号:US4164023A
公开(公告)日:1979-08-07
申请号:US835765
申请日:1977-09-22
CPC分类号: G06G7/19 , G06G7/1907 , G11C27/024
摘要: A permutation memory comprises an input control means for decoding, having plurality L of inputs for an L-bit binary number, and a plurality 2.sup.L of outputs. Means are connected to the decoding means, for initiating the read-in of the L-bit number. Means are provided for applying an input signal. A first plurality of 2.sup.L of normally open switching means are connected to the 2.sup.L outputs of the decoding means and to the signal applying means. A plurality of 2.sup.L of means are connected to the switching means, for storing a charge when a specific switching means, connected to a corresponding charge storing means, is in a closed condition. A second plurality 2.sup.L of switching means are connected to the first plurality of switching means and to the charge storing means. An output control means, connected to the second plurality of switching means, reads out the states of the 2.sup.L charge-storing means, as to the amount of charge in each. Means are connected to the read-out means, for initiating the read-out.
摘要翻译: 置换存储器包括用于解码的输入控制装置,具有用于L位二进制数的多个L个输入和多个2L的输出。 装置连接到解码装置,用于启动L位数的读入。 提供了用于施加输入信号的装置。 第一组多个2L常开开关装置连接到解码装置的2L输出端和信号施加装置。 多个2L的装置连接到开关装置,用于当连接到相应的电荷存储装置的特定开关装置处于关闭状态时存储电荷。 第二多个2L的开关装置连接到第一多个开关装置和电荷存储装置。 输出控制装置,连接到第二多个开关装置,读取2L电荷存储装置的状态,关于每个开关装置的充电量。 装置连接到读出装置,用于启动读出。
-
公开(公告)号:US4060850A
公开(公告)日:1977-11-29
申请号:US791132
申请日:1977-04-25
申请人: Jeffrey M. Speiser
发明人: Jeffrey M. Speiser
CPC分类号: H01Q3/26 , G06F17/10 , G06G7/1921 , G10K11/343
摘要: A beam former, to be used with a circular array of N receiving elements, toreq.3, comprising a set of N discrete Fourier transform (DFT) devices, each one connected to one of the receiving elements, for taking a temporal discrete Fourier transform of the signals at each of the N receiving elements. Means are connected to the array of DFT devices, for connecting sequentially to each of the N devices. A reference function generator generates the sequence of terms ##EQU1## where the argument x is equal to the number of wavelengths in the circumference of the circular array at the frequency being processed, and M is several times greater than x. A means connected to the connecting means and to the reference function generator circularly convolves the signals, for example, acoustic signals, received from the connecting means and the function generator. The beam former may further comprise means connected to the convolving means for displaying the inverse discrete Fourier transform, and therefore the beam pattern.
摘要翻译: 一种用于N个接收元件的圆形阵列的波束成形器,N> / = 3,包括一组N个离散傅立叶变换(DFT)装置,每个装置连接到一个接收元件,用于获取时间离散 每个N个接收元件的信号进行傅里叶变换。 装置连接到DFT装置的阵列,用于顺序连接到N个装置中的每一个。 参考函数发生器产生术语序列
(1),其中参数x等于正在处理的频率的圆周阵列的圆周波长数,M是x的数倍。 连接到连接装置和参考功能发生器的装置循环地卷绕从连接装置和功能发生器接收的信号,例如声信号。 波束形成器还可以包括连接到卷积装置的装置,用于显示逆离散傅里叶变换,并因此显示波束图案。 -
公开(公告)号:US3971927A
公开(公告)日:1976-07-27
申请号:US628433
申请日:1975-11-03
CPC分类号: G06F17/147
摘要: Apparatus for performing an even discrete cosine transform (EDCT) on an it signal of size 2N, with components for an EDCT of size N, which comprises four similar modules, for performing an extended discrete Fourier transform (EDFT) on their input signals. Each EDFT module comprises means for generating the signal ##EQU1## s = - (N- 1), . . . , (N- 1), an input multiplier, a transversal filter, and an output multiplier. The apparatus further comprises a switching means, means for generating a signal (- 1).sup.n, two input multipliers, two complex attenuators, two other means for generating a signal, four output multipliers, two signal summers, and two circuits for taking the real part of an input signal.
摘要翻译: 用于对大小为2N的输入信号执行均匀离散余弦变换(EDCT)的设备,其具有尺寸为N的EDCT的组件,其包括四个类似的模块,用于在其输入信号上执行扩展的离散傅里叶变换(EDFT)。 每个EDFT模块包括用于产生信号的装置,其特征在于, 的。 的。 ,(N-1),输入乘法器,横向滤波器和输出乘法器。 该装置还包括切换装置,用于产生信号( - 1)n,两个输入乘法器,两个复数衰减器,用于产生信号的两个其它装置,四个输出乘法器,两个信号加法器和两个电路 输入信号的一部分。
-
7.
公开(公告)号:US4282579A
公开(公告)日:1981-08-04
申请号:US86967
申请日:1979-10-22
IPC分类号: G06G7/19 , H03H17/02 , G06F15/332 , G06G7/12
CPC分类号: G06G7/1921 , H03H17/0211
摘要: A transform system provides a real-time implementation of the discrete Foer transform (DFT) of length N, the system being useful in sonar and radar signal processing. The input signal g.sub.n, 0.ltoreq.n.ltoreq.N-1, comprises a discrete signal, generally complex, of N samples.The system comprises an input for receiving the input signal g.sub.n and convolving in a first, input, convolver with a signal represented by the function e.sup.i.pi.n.spsp.2.sup./N , to result in a first modified signal at the output of the first convolver. Means are provided for generating the signal e.sup.-i.pi.n.spsp.2.sup./N. A multiplier receives the first modified signal and the signal e.sup.-i.pi.n.spsp.2.sup./N and multiplies these two signals its output being a second modified signal.A second, output, convolver, whose input is connected to the output of the multiplier, convolves the output signal from the multiplier with a signal represented by the function e.sup.i.pi.n.spsp.2.sup./N, to result in a discrete Fourier transformed (DFT) signal at the output. The output signal is generally a complex signal, having a real part and an imaginary part. One of the three chirps, represented by the two signals e.sup.i.pi.n.spsp.2.sup./N and the signal e.sup.-i.pi.n.spsp.2.sup./N, is multiplied by a factor of (1-i) either explicitly or in a summer for the corresponding complex operation in order to obtain the correct output phase.
摘要翻译: 变换系统提供长度为N的离散傅里叶变换(DFT)的实时实现,该系统在声纳和雷达信号处理中是有用的。 输入信号gn,n = N,其中N个采样的离散信号通常是复数的。 该系统包括用于接收输入信号gn并且在第一输入卷积器中卷积有由函数ei1n2 / N表示的信号的输入,以在第一卷积器的输出处产生第一修改信号。 提供用于产生信号e-i pi n2 / N的装置。 乘法器接收第一修改信号和信号e-i pi n2 / N,并将这两个信号相乘,其输出是第二修改信号。 第二个输出,卷积器,其输入连接到乘法器的输出端,将来自乘法器的输出信号与由函数ei1n2 / N表示的信号进行卷积,得到离散傅立叶变换(DFT)信号 输出。 输出信号通常是具有实部和虚部的复信号。 由两个信号ei1n2 / N和信号ei1n2 / N表示的三个啁啾中的一个被明确地或在夏天中用于相应的复杂操作被乘以(1-i)的因子,以获得 正确的输出阶段。
-
公开(公告)号:US4254417A
公开(公告)日:1981-03-03
申请号:US67977
申请日:1979-08-20
申请人: Jeffrey M. Speiser
发明人: Jeffrey M. Speiser
CPC分类号: G10K11/343
摘要: A frequency-domain beamformer is used with arrays comprising M rings with a maximum of N elements per ring, the positions of the elements having rotational symmetry. An element need not be present at each position. The outputs of each of the M rings of arrays are connected to the inputs of M sets of lowpass filters, each set comprising N filters. Each filter output is an input to a sample-and-hold circuit.A temporal discrete Fourier transform (DFT) is performed on the output signal from each sample-and-hold circuit. M demultiplexers, one for each of the M sets of DFT circuits, convert their parallel input signals into serial output signals.A memory, or function generator, is used for steering. A circular convolver convolves the outputs of the demultiplexers and the memories, the outputs of the convolvers being summed in an output summer.The beamformer is used with a 3-D array such that it has rotational symmetry, that is, if rotated at some angle, the situation is exactly the same as before the rotation.
摘要翻译: 使用频域波束形成器,其阵列包括每个环最多具有N个元素的M个环,所述元件的位置具有旋转对称性。 每个位置都不需要一个元素。 阵列的每个M个环的输出连接到M组低通滤波器的输入,每组包括N个滤波器。 每个滤波器输出是采样和保持电路的输入。 对来自每个采样和保持电路的输出信号执行时间离散傅立叶变换(DFT)。 M个解复用器,一组用于M组DFT电路中的每一个,将它们的并行输入信号转换为串行输出信号。 内存或函数发生器用于转向。 圆形卷积器卷积解复用器和存储器的输出,卷积器的输出在输出加法器中相加。 波束形成器与3-D阵列一起使用,使其具有旋转对称性,即如果以某种角度旋转,则情况与旋转之前完全相同。
-
9.
公开(公告)号:US4196448A
公开(公告)日:1980-04-01
申请号:US905902
申请日:1978-05-15
申请人: Harper J. Whitehouse , Robert W. Means , Edwin H. Wrench, Jr. , Jeffrey M. Speiser , Allan G. Weber
发明人: Harper J. Whitehouse , Robert W. Means , Edwin H. Wrench, Jr. , Jeffrey M. Speiser , Allan G. Weber
CPC分类号: H04N19/619
摘要: An image-compression system, wherein the image consists of a planar array of data points having various brightness levels, comprises a transmitter and a receiver. The transmitter comprises an analog-digital converter, for converting input analog data into digital data. The cosine transform is taken of the incoming digital data to transform the data representing various brightness levels into the frequency domain. The various frequency data points are differentially pulse code modulated, thereby removing line-to-line redundancy, the output data being in parallel form. Timing circuitry is provided for controlling the timing of the various circuits. Circuitry is provided in a receiver for the modulating or decoding of the output signal of the transmitter.
摘要翻译: 一种图像压缩系统,其中图像由具有各种亮度级的数据点的平面阵列组成,包括发射机和接收机。 发射机包括用于将输入的模拟数据转换为数字数据的模数转换器。 采用输入数字数据进行余弦变换,将表示各种亮度级别的数据转换为频域。 各种频率数据点进行差分脉冲编码调制,从而消除线间冗余,输出数据为并行形式。 提供了用于控制各种电路的定时的定时电路。 在接收机中提供用于调制或解码发射机的输出信号的电路。
-
公开(公告)号:US4068311A
公开(公告)日:1978-01-10
申请号:US747148
申请日:1976-12-03
CPC分类号: G06G7/19 , G06G7/1907 , G11C27/024
摘要: High-speed, high-accuracy, apparatus for performing discrete Fourier and crete cosine transforms, suitable for signal processing applications. The apparatus includes a means for switching an input signal from a sample-and-hold circuit to a circuit which includes an integrator in cascade with an amplifier. The outputs of these two circuits are summed in a first summer to give one term, G.sub.0, which is proportional to the d-c component of the input signal. In parallel with the integrator and amplifier is a cascade circuit comprising a first permuter, a filter and a second permuter. A permuter is a special type of memory. The outputs of the sample-and-hold circuit and of the second permuter are summed in a second summer, to result in an output comprising the other transformed terms, G.sub.1, . . . , G.sub.N-1.
摘要翻译: 用于执行离散傅立叶和离散余弦变换的高速,高精度设备,适用于信号处理应用。 该装置包括用于将来自采样和保持电路的输入信号切换到包括与放大器级联的积分器的电路的装置。 这两个电路的输出在第一个夏天相加,以给出与输入信号的d-c分量成比例的一个项G0。 与积分器和放大器并联是包括第一变容器,滤波器和第二置换器的级联电路。 置换器是一种特殊类型的存储器。 采样保持电路和第二置换器的输出在第二个加法器中相加,以产生包括其他变换项G1的输出。 。 。 ,GN-1。
-
-
-
-
-
-
-
-
-