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公开(公告)号：US10768199B2
公开(公告)日：2020-09-08
申请号：US15639524
申请日：2017-06-30
Applicant: STMICROELECTRONICS S.R.L.
Inventor： Alessandro Tocchio , Francesco Rizzini
IPC: G01P15/18 , G01P15/097 , G01P15/125 , G01P15/08
Abstract: A MEMS tri-axial accelerometer is provided with a sensing structure having: a single inertial mass, with a main extension in a horizontal plane defined by a first horizontal axis and a second horizontal axis and internally defining a first window that traverses it throughout a thickness thereof along a vertical axis orthogonal to the horizontal plane; and a suspension structure, arranged within the window for elastically coupling the inertial mass to a single anchorage element, which is fixed with respect to a substrate and arranged within the window, so that the inertial mass is suspended above the substrate and is able to carry out, by the inertial effect, a first sensing movement, a second sensing movement, and a third sensing movement in respective sensing directions parallel to the first, second, and third horizontal axes following upon detection of a respective acceleration component. In particular, the suspension structure has at least one first decoupling element for decoupling at least one of the first, second, and third sensing movements from the remaining sensing movements.
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492.发明授权公开(公告)号：US10761279B2
公开(公告)日：2020-09-01
申请号：US16428428
申请日：2019-05-31
Applicant: STMicroelectronics S.r.l.
Inventor： Mark Andrew Shaw , Luca Maggi , Antonio Fincato
Abstract: A method includes providing a semiconductor body comprising a surface with a recessed portion therein. The recessed portion includes a bottom surface. Optical waveguide cores in a first array of optical waveguide cores extend side-by-side at the bottom surface. The method further includes providing a second array of optical waveguide cores over the first array of optical waveguide cores. Optical waveguide cores in the second array of optical waveguide cores extend side-by-side. Each optical waveguide core in the second array of optical waveguide cores is in an adiabatic coupling relationship with a corresponding optical waveguide core in the first array of optical waveguide cores. The method also includes applying an optical waveguide cladding material over the second array of optical waveguide cores.
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公开(公告)号：US10759168B2
公开(公告)日：2020-09-01
申请号：US16357077
申请日：2019-03-18
Applicant: STMICROELECTRONICS, INC. , STMICROELECTRONICS INTERNATIONAL N.V. , STMICROELECTRONICS S.R.L.
Inventor： Simon Dodd , David S. Hunt , Joseph Edward Scheffelin , Dana Gruenbacher , Stefan H. Hollinger , Uwe Schober , Peter Janouch
Abstract: The present disclosure provides supports for microfluidic die that allow for nozzles of the microfluidic die to be on a different plane or face a different direction from electrical contacts on the same support. This includes a rigid support having electrical contacts on a different side of the rigid support with respect to a direction of ejection of the nozzles, and a semi-flexible support or semi-rigid support that allow the electrical contacts to be moved with respect to a direction of ejection of the nozzles. The semi-flexible and semi-rigid supports allow the die to be up to and beyond a 90 degree angle with respect to a plane of the electrical contacts. The different supports allow for a variety of positions of the microfluidic die with respect to a position of the electrical contacts.
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公开(公告)号：US10758152B2
公开(公告)日：2020-09-01
申请号：US16429254
申请日：2019-06-03
Applicant: STMicroelectronics S.r.l.
Inventor： Marco Passoni , Alessia Cagidiaco , Stefano Rossi
Abstract: A method and apparatus for compensating and calibrating a bio-impedance measurement device are provided. In the method and apparatus, a memory stores a plurality of compensation parameters and a first detection channel receives a first detection signal, compensates the first detection signal using a first compensation parameter of the plurality of compensation parameters. In the method and apparatus, a second detection channel receives a second detection signal and a third detection signal and compensates the second and third detection signals using second and third compensation parameters of the plurality of compensation parameters and the compensated first detection signal. The impedance measurement device generates a first output signal representative of a first impedance measurement and a second output signal representative of a second impedance measurement based on the compensated first, second and third detection signals.
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公开(公告)号：US20200266623A1
公开(公告)日：2020-08-20
申请号：US16790888
申请日：2020-02-14
Applicant: STMicroelectronics S.r.l.
Inventor： Romeo LETOR
Abstract: A protection circuit for an automotive wiring harness includes an input node receiving a sensing signal indicating intensity of current in a conductor, an output node emitting a current control output signal to reduce the current and/or emitting a warning signal indicating the current intensity having reached a limit value. Signal processing circuitry coupled to the input node compares the current intensity with a reference value, and produces a comparison signal indicating whether the current intensity exceeds the reference value. A counting circuitry driven by the comparison signal counts in a first count direction as a result of the comparison signal indicating that the current intensity exceeds the reference value. Latching circuitry coupled to the counter circuitry generates the output signal at the output node as a result of the count value of the counter circuitry reaching a limit value.
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Patent Agency Ranking
公开(公告)号：US20200264648A1
公开(公告)日：2020-08-20
申请号：US16867299
申请日：2020-05-05
Applicant: STMicroelectronics S.r.l.
Inventor： Calogero Marco IPPOLITO , Mario CHIRICOSTA
Abstract: A circuit for generating a bandgap voltage includes a circuit module for generation of a base-emitter voltage difference formed by a pair of PNP bipolar substrate transistors which identify a first current path and a second current path. A first current mirror of an n type is connected between the first and second branches and is further connected via a resistance for adjustment of the bandgap voltage to the second bipolar transistor. A second current mirror of a p type is connected between the first and second branches, and connected so that the current mirrors repeat current of each other. In operation to generate the bandgap voltage, current flows from the supply voltage to ground only through said the first and second bipolar substrate transistors.
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公开(公告)号：US10746787B2
公开(公告)日：2020-08-18
申请号：US16211882
申请日：2018-12-06
Applicant: STMicroelectronics S.r.l.
Inventor： Alberto Pagani
Abstract: A testing architecture for integrated circuits on a wafer includes at least one first circuit of a structure test element group (TEG) realized in a scribe line providing separation between first and second integrated circuits. At least one pad is shared by a second circuit inside at least one of the first and second integrated circuits and the first circuit. Switching circuitry is coupled to the at least one pad and to the first and second circuits.
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498.发明申请公开(公告)号：US20200258885A1
公开(公告)日：2020-08-13
申请号：US16863856
申请日：2020-04-30
Inventor： Fabio DE SANTIS , Vikas RANA
IPC: H01L27/105 , H01L27/11521 , H01L27/112 , G11C29/00 , H01L27/11519 , H01L27/11558
Abstract: According to principles as discussed herein, an EEPROM cell is provided and then, after testing the code, using the exact same architecture, transistors, memory cells, and layout, the EEPROM cell is converted to a read-only memory (“ROM”) cell. This conversion is done on the very same integrated circuit die using the same layout, design, and timing with only a single change in an upper level mask in the memory array. In one embodiment, the mask change is the via mask connecting metal 1 to poly. This allows the flexibility to store the programming code as non-volatile memory code, and then after it has been tested, at time selected by the customer, some or all of that code from a code that can be written to a read-only code that is stored in a ROM cell that is composed the same transistors and having the same layout.
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499.发明申请公开(公告)号：US20200252790A1
公开(公告)日：2020-08-06
申请号：US16781278
申请日：2020-02-04
Applicant: STMicroelectronics S.r.l.
Inventor： Francesco Caserta
Abstract: A method for sharing a same profile on different integrated circuit cards includes performing a profile enable procedure for a first profile on a first mobile device; performing a mobile device authentication procedure between the first mobile device and the mobile network; and performing by the mobile network, a location update operation using identifier information including subscriber information.
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500.发明申请公开(公告)号：US20200252035A1
公开(公告)日：2020-08-06
申请号：US16736513
申请日：2020-01-07
Applicant: STMicroelectronics S.r.l.
Inventor： Alberto Danioni
IPC: H03F3/16 , H03K19/0185 , H04R19/04 , H04R3/00
Abstract: A charge amplifier circuit is provided. The charge amplifier circuit is couplable to a transducer that generates an electrical charge that varies with an external stimulus. The charge amplifier circuit includes an amplification stage having an input node, couplable to the transducer, and an output node. The amplification stage biases the input node at a first direct current (DC) voltage. The charge amplifier circuit includes a feedback circuit, which includes a feedback capacitor, electrically coupled between the input and output nodes of the amplification stage. The feedback circuit includes a resistor electrically coupled to the input node, and a level-shifter circuit, electrically coupled between the resistor and the output node. The level-shifter circuit biases the output node at a second DC voltage and as a function of a difference between the second DC voltage and a reference voltage.
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