公开(公告)号：US07880169B2

公开(公告)日：2011-02-01

申请号：US12348790

申请日：2009-01-05

申请人： Myung-Koo Hur

发明人： Myung-Koo Hur

IPC分类号： H01L31/036

CPC分类号： H01L29/78696 ,  H01L27/1248 ,  H01L29/66765

摘要： A display apparatus includes a gate electrode, a first insulating layer pattern formed over the gate electrode, a second insulating layer pattern formed over the first insulating layer pattern, exposing a portion of the first insulating layer, a semiconductor film pattern formed over the second insulating layer pattern and over the first insulating layer pattern, an impurity-doped semiconductor film pattern formed on the semiconductor film pattern, wherein the impurity-doped semiconductor film pattern contacts the top surface of the semiconductor film pattern and exposes a portion of the semiconductor film pattern formed over the gate electrode, a source electrode and a drain electrode each formed over a portion of the impurity doped semiconductor film pattern, a protection film pattern formed over the source electrode and the drain electrode in a TFT area, the protection film pattern having a contact hole over the drain electrode, a pixel electrode pattern formed on the protection film pattern and_electrically connected to the drain electrode.

摘要翻译： 一种显示装置，包括栅电极，形成在栅电极上的第一绝缘层图案，形成在第一绝缘层图案上的第二绝缘层图案，暴露第一绝缘层的一部分，形成在第二绝缘层上的半导体膜图案 并且在所述第一绝缘层图案之上，形成在所述半导体膜图案上的杂质掺杂半导体膜图案，其中所述杂质掺杂半导体膜图案接触所述半导体膜图案的顶表面并且暴露所述半导体膜图案的一部分 形成在所述栅电极上，源电极和漏电极，各自形成在所述杂质掺杂半导体膜图案的一部分上，在TFT区域中形成在所述源电极和所述漏极上的保护膜图案，所述保护膜图案具有 漏极上的接触孔，形成在保护膜上的像素电极图案 m图案并且电连接到漏电极。

公开(公告)号：US07714820B2

公开(公告)日：2010-05-11

申请号：US10877388

申请日：2004-06-25

申请人： Myung-Jae Park ,  Hyang-Shik Kong ,  Myung-Koo Hur ,  Jong-Woong Chang ,  Seong-Young Lee ,  Dong-Gyu Kim

发明人： Myung-Jae Park ,  Hyang-Shik Kong ,  Myung-Koo Hur ,  Jong-Woong Chang ,  Seong-Young Lee ,  Dong-Gyu Kim

IPC分类号： G09G3/36

CPC分类号： G02F1/13458 ,  G02F1/1345

摘要： A thin film transistor array panel is provided, which includes: a display cell array circuit including a plurality of gate lines, a plurality of data lines, a plurality of thin film transistors, and a plurality of pixel electrodes; a gate driving circuit supplying gate signals to the gate lines; and a signal line connected to the gate driving circuit and including first and second line segments separated from each other and a connection member connected to the first and second line segments through at least a contact hole exposing at least one of the first and the second line segments.

摘要翻译： 提供薄膜晶体管阵列面板，其包括：显示单元阵列电路，包括多个栅极线，多条数据线，多个薄膜晶体管和多个像素电极; 栅极驱动电路，向栅极线提供栅极信号; 以及连接到栅极驱动电路并且包括彼此分离的第一和第二线段的信号线以及通过至少暴露第一和第二线中的至少一个的接触孔连接到第一和第二线段的连接构件 细分。

公开(公告)号：US20100001756A1

公开(公告)日：2010-01-07

申请号：US12560699

申请日：2009-09-16

申请人： Sung-Man KIM ,  Myung-Koo HUR ,  Beom-Jun KIM ,  Seong-Young LEE

发明人： Sung-Man KIM ,  Myung-Koo HUR ,  Beom-Jun KIM ,  Seong-Young LEE

IPC分类号： G01R31/00

CPC分类号： G09G3/006 ,  G09G3/3677 ,  G09G2300/0408

摘要： In an array substrate and a display apparatus, a pixel part has a plurality of gate lines, a plurality of data lines, and a plurality of pixels electrically connected to the gate and data lines. A driving circuit drives the pixel part electrically connected to a first end of the gate lines. An inspection circuit is electrically connected to a second end of the gate lines, and inspects the pixel part in response to an inspection signal externally provided. Thus, positions and causes for defects of the pixel part may be accurately detected, thereby improving inspecting efficiency.

摘要翻译： 在阵列基板和显示装置中，像素部分具有电连接到栅极和数据线的多条栅极线，多条数据线以及多个像素。 驱动电路驱动电连接到栅极线的第一端的像素部分。 检查电路电连接到栅极线的第二端，并且响应于外部提供的检查信号检查像素部分。 因此，可以精确地检测像素部分的缺陷的位置和原因，从而提高检查效率。

公开(公告)号：US20090243985A1

公开(公告)日：2009-10-01

申请号：US12407626

申请日：2009-03-19

申请人： Myung-Jae Park ,  Hyang-Shik Kong ,  Myung-Koo Hur ,  Jong-Woong Chang ,  Seong-Young Lee ,  Dong-Gyu Kim

发明人： Myung-Jae Park ,  Hyang-Shik Kong ,  Myung-Koo Hur ,  Jong-Woong Chang ,  Seong-Young Lee ,  Dong-Gyu Kim

IPC分类号： G09G3/36 ,  G02F1/1343 ,  G02F1/1333

CPC分类号： G02F1/13458 ,  G02F1/1345

摘要： A thin film transistor array panel is provided, which includes: a display cell array circuit including a plurality of gate lines, a plurality of data lines, a plurality of thin film transistors, and a plurality of pixel electrodes; a gate driving circuit supplying gate signals to the gate lines; and a signal line connected to the gate driving circuit and including first and second line segments separated from each other and a connection member connected to the first and second line segments through at least a contact hole exposing at least one of the first and the second line segments.

摘要翻译： 提供薄膜晶体管阵列面板，其包括：显示单元阵列电路，包括多个栅极线，多条数据线，多个薄膜晶体管和多个像素电极; 栅极驱动电路，向栅极线提供栅极信号; 以及连接到栅极驱动电路并且包括彼此分离的第一和第二线段的信号线以及通过至少暴露第一和第二线中的至少一个的接触孔连接到第一和第二线段的连接构件 细分。

公开(公告)号：US20090040203A1

公开(公告)日：2009-02-12

申请号：US12218814

申请日：2008-07-18

申请人： Sung-Man Kim ,  Hong-Woo Lee ,  Myung-Koo Hur ,  Hee-Joon Kim

发明人： Sung-Man Kim ,  Hong-Woo Lee ,  Myung-Koo Hur ,  Hee-Joon Kim

IPC分类号： G06F3/038

CPC分类号： G09G3/3677 ,  G09G2310/0286 ,  G11C19/184

摘要： A gate driving circuit and a display device having the same, a pull-up unit pulls up a current gate signal by using a first clock signal during a first period of one frame. A pull-up driver coupled to the pull-up unit receives a carry signal from one of the previous stages to turn on the pull-up unit. A pull-up unit receives a gate signal from one of the next stages, discharges the current gate signal to an off voltage level, and turns off the pull-up unit. A holder holds the current gate signal at the voltage level. An inverter turns on/off the holder in response to a first clock signal. A ripple preventer has a source and a gate coupled in common to an output terminal of the pull-up unit and a drain coupled to an input terminal of the inverter, and includes a ripple preventing diode for preventing a ripple from being applied to the inverter.

摘要翻译： 一种栅极驱动电路和具有该栅极驱动电路的显示装置，上拉单元在一帧的第一周期期间通过使用第一时钟信号来上拉电流门信号。 耦合到上拉单元的上拉驱动器从前一级之一接收进位信号，以接通上拉单元。 上拉单元接收来自下一级中的一个的门信号，将当前门信号放电至截止电压电平，并关闭上拉单元。 持有者将当前门信号保持在电压电平。 逆变器响应于第一个时钟信号打开/关闭支架。 波纹防止器具有与上拉单元的输出端子共同耦合的源极和栅极，以及耦合到反相器的输入端子的漏极，并且包括用于防止纹波施加到逆变器的纹波防止二极管 。

公开(公告)号：US20080316384A1

公开(公告)日：2008-12-25

申请号：US12033986

申请日：2008-02-20

申请人： Bong-Jun LEE ,  Myung-Koo HUR ,  Jong-Oh KIM ,  Dong-Wuuk SEO ,  Sung-Man KIM

发明人： Bong-Jun LEE ,  Myung-Koo HUR ,  Jong-Oh KIM ,  Dong-Wuuk SEO ,  Sung-Man KIM

IPC分类号： G02F1/136 ,  H01L29/04 ,  H01L21/84

CPC分类号： G02F1/136213 ,  H01L27/12 ,  H01L27/124 ,  H01L29/41733

摘要： A display substrate includes a first metal pattern formed on a substrate and includes a data line to which a pixel voltage is applied, an insulating layer formed on the substrate on which the first metal pattern is formed, an active pattern formed on the insulating layer, a second metal pattern formed on the insulating layer and including a gate line and a storage line, the gate line crossing the data line, a scanning signal applied to the gate line, a protective layer formed on the substrate on which the second metal pattern is formed, and a pixel electrode formed on the protective layer. A method for manufacturing the display substrate, and a display apparatus including the display substrate are further provided.

摘要翻译： 显示基板包括形成在基板上的第一金属图案，并且包括施加了像素电压的数据线，形成在其上形成有第一金属图案的基板上的绝缘层，形成在绝缘层上的有源图案， 形成在绝缘层上的第二金属图案，包括栅极线和存储线，与数据线交叉的栅极线，施加到栅极线的扫描信号，形成在基板上的保护层，第二金属图案 以及形成在保护层上的像素电极。 还提供了一种制造显示基板的方法，以及包括显示基板的显示装置。

公开(公告)号：US20080198283A1

公开(公告)日：2008-08-21

申请号：US12004742

申请日：2007-12-19

申请人： Yeo-Geon Yoon ,  Myung-Koo Hur ,  Sang-Ki Kwak

发明人： Yeo-Geon Yoon ,  Myung-Koo Hur ,  Sang-Ki Kwak

IPC分类号： G02F1/1343 ,  G09G3/36

CPC分类号： G09G3/3648 ,  G02F1/1345 ,  G09G3/3614 ,  G09G2300/0426 ,  G09G2310/0297

摘要： A display panel includes a plurality of gate lines, a plurality of data lines and a plurality of pixel groups. The gate lines extend in a first direction and sequentially receive gate signals, and the data lines extend in a second direction that is substantially perpendicular to the first direction and receive data signals. Each pixel group includes first, second and third vertical pixels that extend in the second direction and are sequentially arranged in the first direction. The first to third vertical pixels are arranged horizontally and are electrically connected to three consecutive gate lines to receive gate signals, and are connected to two or fewer data lines to receive the data signals.

摘要翻译： 显示面板包括多条栅极线，多条数据线和多个像素组。 栅极线在第一方向上延伸并且顺序地接收栅极信号，并且数据线在基本上垂直于第一方向的第二方向上延伸并且接收数据信号。 每个像素组包括在第二方向上延伸并沿第一方向依次布置的第一，第二和第三垂直像素。 第一至第三垂直像素水平排列并且电连接到三个连续的栅极线以接收栅极信号，并且连接到两个或更少的数据线以接收数据信号。

公开(公告)号：US20080048709A1

公开(公告)日：2008-02-28

申请号：US11881776

申请日：2007-07-26

申请人： Hong Woo Lee ,  Myung Koo Hur ,  Jong Hwan Lee ,  Sung Man Kim ,  Jong Hyuk Lee

发明人： Hong Woo Lee ,  Myung Koo Hur ,  Jong Hwan Lee ,  Sung Man Kim ,  Jong Hyuk Lee

IPC分类号： G01R31/00

CPC分类号： G09G3/006 ,  G09G3/3614 ,  G09G3/3648

摘要： The present invention relates to a module and method for detecting a defect of a thin film transistor (TFT) substrate, which can detect disconnection of a gate line of the TFT substrate having gate drivers provided with a dual structure in which the gate drivers are provided at both sides of the gate lines. There is provided a module and method for detecting a defect of a TFT substrate, wherein gate lines are separated into two portions by cutting a central region of the gate lines, gate power is supplied to the gate lines of which central portions are cut through gate drivers provided at both sides of the gate lines, and a signal of a negative voltage level is supplied to data lines, so that disconnection of the gate lines can be detected.

摘要翻译： 本发明涉及一种用于检测薄膜晶体管（TFT）基板的缺陷的模块和方法，该薄膜晶体管（TFT）基板可以检测具有栅极驱动器的TFT基板的栅极线的断开，该栅极驱动器设置有提供栅极驱动器的双重结构 在门线的两边。 提供了一种用于检测TFT基板的缺陷的模块和方法，其中通过切割栅极线的中心区域将栅极线分成两部分，栅极功率被提供给通过栅极切割中心部分的栅极线 提供在栅极线的两侧的驱动器，并且向数据线提供负电压电平的信号，从而可以检测到栅极线的断开。

公开(公告)号：US20080043191A1

公开(公告)日：2008-02-21

申请号：US11839752

申请日：2007-08-16

申请人： Sung-Man Kim ,  Myung-Koo Hur ,  Jong-Hwan Lee ,  Yong Woo Lee ,  Hong-Woo Lee ,  Jin-Suk Seo

发明人： Sung-Man Kim ,  Myung-Koo Hur ,  Jong-Hwan Lee ,  Yong Woo Lee ,  Hong-Woo Lee ,  Jin-Suk Seo

IPC分类号： G02F1/1343

CPC分类号： G02F1/133707

摘要： Disclosed is a liquid crystal display device including a first substrate, a second substrate, and a liquid crystal layer interposed there between. The first substrate is provided with gate lines and data lines thereon. The gate lines and data lines cross with each other and are insulated from each other. Pixel electrodes are stacked on the gate lines and data lines. Each pixel electrode includes first and second sub-pixel electrodes spaced apart from each other and a connection electrode, which connects the first sub-pixel electrode to the second sub-pixel electrode. The second substrate is provided with a common electrode thereon. The common electrode includes a first domain divider formed on the center of the first sub-pixel electrode and a second domain divider formed on the center of the second sub-pixel electrode.

摘要翻译： 公开了一种液晶显示装置，包括第一基板，第二基板和介于其间的液晶层。 第一基板上设置有栅线和数据线。 栅极线和数据线彼此交叉并且彼此绝缘。 像素电极堆叠在栅极线和数据线上。 每个像素电极包括彼此间隔开的第一和第二子像素电极和将第一子像素电极连接到第二子像素电极的连接电极。 第二基板上设置有公共电极。 公共电极包括形成在第一子像素电极的中心上的第一域分隔器和形成在第二子像素电极的中心的第二域分隔器。

公开(公告)号：US20070114531A1

公开(公告)日：2007-05-24

申请号：US11625435

申请日：2007-01-22

申请人： Myung-Koo Hur ,  Chang-Oh Jeong

发明人： Myung-Koo Hur ,  Chang-Oh Jeong

IPC分类号： H01L29/04

CPC分类号： G02F1/136286 ,  G02F2001/13629 ,  G02F2001/136295

摘要： A wire for a liquid crystal display has a dual-layered structure comprising a first layer made of molybdenum or molybdenum alloy, and a second layer made of molybdenum nitride or molybdenum alloy nitride. To manufacture the wire, a layer made of either a molybdenum or a molybdenum alloy, and another layer one of either a molybdenum nitride or molybdenum alloy nitride by using reactive sputtering method are deposited in sequence, and then patterned simultaneously. The target for reactive sputtering is made of either molybdenum or molybdenum alloy, and the molybdenum alloy comprises one selected from the group consisting of tungsten, chromium, zirconium, and nickel of the content ratio of 0.1 to less than 20 atm % of. The reactive gas mixture for reactive sputtering includes an argon gas and inflow amount of the nitrogen gas is at least 50% of argon gas, to minimize the etch rate of the molybdenum nitride layer or the molybdenum alloy nitride layer for ITO etchant.

摘要翻译： 用于液晶显示器的线具有包括由钼或钼合金制成的第一层和由氮化钼或钼合金氮化物制成的第二层的双层结构。 为了制造导线，依次沉积由钼或钼合金制成的层，以及通过使用反应溅射法的氮化钼或钼合金氮化物中的另一层，然后同时进行图案化。 反应溅射的目的是由钼或钼合金制成，钼合金包含选自钨，铬，锆和镍中的一种，其含量比例为0.1至小于20atm％。 用于反应溅射的反应性气体混合物包括氩气，并且氮气的流入量为氩气的至少50％，以最小化用于ITO蚀刻剂的氮化钼层或钼合金氮化物层的蚀刻速率。