公开(公告)号：US20220004076A1

公开(公告)日：2022-01-06

申请号：US17476668

申请日：2021-09-16

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Frédéric Boeuf ,  Cyrille Barrera

IPC: G02F1/225 ,  G02F1/025 ,  G02F1/035

Abstract: A capacitive electro-optical modulator includes a silicon layer having a cavity having sidewalls and a floor. A germanium or silicon-germanium strip overlies the silicon layer within the cavity. A silicon strip overlies the germanium or silicon-germanium strip within the cavity. The silicon strip is wider than the germanium or silicon-germanium strip. An insulator fills the cavity laterally adjacent the germanium or silicon-germanium strip and the silicon strip and extending between the sidewalls of the cavity. An upper insulating layer overlies the silicon strip and the insulator. A layer of III-V material overlies the upper insulating layer. The layer of III-V material formed as a third strip is arranged facing the silicon strip and separated therefrom by a portion of the upper insulating layer.

公开(公告)号：US20220003932A1

公开(公告)日：2022-01-06

申请号：US17476152

申请日：2021-09-15

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Patrick Le Maitre ,  Nicolas Michit

IPC: G02B6/293 ,  G02B6/12 ,  G02F1/225

Abstract: A ring resonator electro-optical device includes a first silicon nitride waveguide and a second annular silicon waveguide that comprises a first section running under a second section of the first waveguide. The second waveguide also includes an annular silicon strip having a cross-section increasing in the first section from a minimum cross-section located under the second section.

公开(公告)号：US11199731B2

公开(公告)日：2021-12-14

申请号：US17064385

申请日：2020-10-06

Applicant: STMicroelectronics (Crolles 2) SAS ,  Commissariat a l'Energie Atomique et aux Energies Alternatives

Inventor： Patrick Le Maitre ,  Nicolas Michit ,  Jean-Francois Carpentier ,  Benoit Charbonnier

IPC: G01R19/30 ,  G02B6/12 ,  G02F1/01 ,  H01L31/0352 ,  H01L31/103 ,  H01L31/105 ,  G02F1/025

Abstract: A device, includes: a ring waveguide; a diode comprising a junction extending at least partly in the ring waveguide; and a first circuit configured to supply a signal representative of a leakage current in the diode.

公开(公告)号：US20210382189A1

公开(公告)日：2021-12-09

申请号：US17408679

申请日：2021-08-23

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Gilles GASIOT ,  Fady ABOUZEID

IPC: G01T1/24 ,  H01L27/07 ,  H01L31/103

Abstract: A diode and a transistor are connected in parallel. The transistor is located on a first doped region forming a PN junction of the diode with a second doped region located under the first region. The circuit functions as an ionizing radiation detection cell by generating a current through the PN junction which changes by a voltage generated across the transistor. This change in voltage is compared to a threshold to detect the ionizing radiation.

公开(公告)号：US11195872B2

公开(公告)日：2021-12-07

申请号：US16547231

申请日：2019-08-21

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Francois Roy ,  Stephane Hulot ,  Andrej Suler ,  Nicolas Virollet

IPC: H01L27/146

Abstract: A semiconductor image sensor includes a plurality of pixels. Each pixel of the sensor includes a semiconductor substrate having opposite front and back sides and laterally delimited by a first insulating wall including a first conductive core insulated from the substrate, electron-hole pairs being capable of forming in the substrate due to a back-side illumination. A circuit is configured to maintain, during a first phase in a first operating mode, the first conductive core at a first potential and to maintain, during at least a portion of the first phase in a second operating mode, the first conductive core at a second potential different from the first potential.

公开(公告)号：US20210376170A1

公开(公告)日：2021-12-02

申请号：US17324619

申请日：2021-05-19

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Didier DUTARTRE

IPC: H01L31/028 ,  G01S7/4865 ,  H01L27/146 ,  H01L31/103

Abstract: An integrated optical sensor is formed by a pinned photodiode. A semiconductor substrate includes a first semiconductor region having a first type of conductivity located between a second semiconductor region having a second type of conductivity opposite to the first type one and a third semiconductor region having the second type of conductivity. The third semiconductor region is thicker, less doped and located deeper in the substrate than the second semiconductor region. The third semiconductor region includes both silicon and germanium. In one implementation, the germanium within the third semiconductor region has at least one concentration gradient. In another implementation, the germanium concentration within the third semiconductor region is substantially constant.

公开(公告)号：US11152430B2

公开(公告)日：2021-10-19

申请号：US16375571

申请日：2019-04-04

Applicant: STMicroelectronics (Rousset) SAS ,  STMicroelectronics (Crolles 2) SAS

Inventor： Philippe Boivin ,  Jean Jacques Fagot ,  Emmanuel Petitprez ,  Emeline Souchier ,  Olivier Weber

IPC: H01L29/73 ,  H01L27/24 ,  H01L45/00

Abstract: The disclosure relates to integrated circuits and methods including one or more rows of transistors. In an embodiment, an integrated circuit includes a row of bipolar transistors including a plurality of first conduction regions, a second conduction region, and a common base between the first conduction regions and the second conduction region. An insulating trench is in contact with each bipolar transistor of the row of bipolar transistors. A conductive layer is on the insulating trench and the common base between the first conduction regions. A spacer layer is between the conductive layer and the first conduction regions.

公开(公告)号：US11150533B2

公开(公告)日：2021-10-19

申请号：US16931090

申请日：2020-07-16

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Frédéric Boeuf ,  Cyrille Barrera

IPC: G02F1/225 ,  G02F1/025 ,  G02F1/035

Abstract: A capacitive electro-optical modulator includes a silicon layer, a germanium or silicon-germanium strip overlying the silicon layer, and a silicon strip overlying the germanium or silicon-germanium strip. The silicon strip is wider than the germanium or silicon-germanium strip. An insulator is laterally adjacent the germanium or silicon-germanium strip and the silicon strip and has an upper surface that is flush with an upper surface of the silicon strip. An insulating layer overlies the insulator and the silicon strip. A layer of III-V material overlies the insulating layer. The layer of III-V material is formed as a third strip arranged facing the silicon strip and separated therefrom by a portion of the insulating layer.

公开(公告)号：US11150388B2

公开(公告)日：2021-10-19

申请号：US15610150

申请日：2017-05-31

Applicant: STMICROELECTRONICS (CROLLES 2) SAS

Inventor： Vincent Farys ,  Alain Inard ,  Olivier Noblanc

IPC: G02B5/02 ,  C23C16/34 ,  C23C16/56 ,  C23C18/12

Abstract: Methods of manufacture of an optical diffuser. In one embodiment, an optical diffuser is formed by providing a wafer including a silicon slice of which an upper face is covered with a first layer made of a first material itself covered with a second layer made of a second selectively etchable material with respect to the first material. The method further includes forming openings in the second layer extending up to the first layer and filling the openings in the second layer with a third material. The method yet further includes bonding a glass substrate to the wafer on the side of its upper face and removing the silicon slice.

公开(公告)号：US11145780B2

公开(公告)日：2021-10-12

申请号：US16789045

申请日：2020-02-12

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Francois Roy

IPC: H01L31/113 ,  H01L31/0224 ,  H01L27/146

Abstract: A semiconductor substrate doped with a first doping type is positioned adjacent an insulated gate electrode that is biased by a gate voltage. A first region within the semiconductor substrate is doped with the first doping type and biased with a bias voltage. A second region within the semiconductor substrate is doped with a second doping type that is opposite the first doping type. Voltage application produces an electrostatic field within the semiconductor substrate causing the formation of a fully depleted region within the semiconductor substrate. The fully depleted region responds to absorption of a photon with an avalanche multiplication that produces charges that are collected at the first and second regions.