公开(公告)号：US06516409B1

公开(公告)日：2003-02-04

申请号：US09385449

申请日：1999-08-30

申请人： Toshinori Sato

发明人： Toshinori Sato

IPC分类号： G06F932

CPC分类号： G06F9/3844 ,  G06F9/3455 ,  G06F9/383 ,  G06F9/3832

摘要： A processor includes at least one functional unit configured to execute an instruction. The processor also includes an instruction window configured to supply the instruction to the functional unit. The processor further includes a register file configured such that data and a result of execution of the instruction are temporarily stored in the register file. The processor still further includes a branch prediction circuit having a branch execution unit and a branch prediction table. The processor also includes a data value prediction circuit configured to predict a first operand value which will be used by the functional unit and a second operand value which will be used by the branch execution unit to predict a direction of a branch and to store the direction of the branch in the branch prediction table. With such a processor, a branch prediction is made by executing a branch instruction rather than by referring to the history of the branch instruction.

摘要翻译： 处理器包括被配置为执行指令的至少一个功能单元。 处理器还包括指令窗口，其被配置为将指令提供给功能单元。 处理器还包括配置为使得数据和执行指令的结果临时存储在寄存器文件中的寄存器文件。 处理器还包括具有分支执行单元和分支预测表的分支预测电路。 该处理器还包括数据值预测电路，被配置为预测将由功能单元使用的第一操作数值和将由分支执行单元用于预测分支方向并存储方向的第二操作数值 在分支预测表中的分支。 利用这样的处理器，通过执行分支指令而不是参考分支指令的历史来进行分支预测。

公开(公告)号：US5923087A

公开(公告)日：1999-07-13

申请号：US782394

申请日：1997-01-13

申请人： Hiromi Suzuki ,  Toshinori Sato

发明人： Hiromi Suzuki ,  Toshinori Sato

IPC分类号： H01L21/60 ,  H01L23/485 ,  H01L23/532 ,  H01L23/48 ,  H01L21/441

CPC分类号： H01L24/05 ,  H01L23/53223 ,  H01L2224/05083 ,  H01L2224/05166 ,  H01L2224/05187 ,  H01L2224/05624 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/0105 ,  H01L2924/04941 ,  H01L2924/14

摘要： To provide a semiconductor device and a method of making a semiconductor device capable of preventing exfoliation at a pad electrode portion, a barrier metal layer 14, a silicon layer 15 and an aluminum layer 16 are formed on a side of a main face of a silicon substrate 11 (step A), the barrier metal layer 14, the silicon layer 15 and the aluminum layer 16 are patterned into a shape of a pad electrode (step B) and a silicide layer 17 is formed by an annealing treatment successive to the patterning step (step C).

摘要翻译： 为了提供半导体器件和制造能够防止焊盘电极部分剥离的半导体器件的方法，在硅的主面的一侧形成阻挡金属层14，硅层15和铝层16 衬底11（步骤A），阻挡金属层14，硅层15和铝层16被图案化为焊盘电极的形状（步骤B），并且通过与图案化连续的退火处理形成硅化物层17 步骤（步骤C）。