Device and method for updating a pointer value by switching between pointer values
    1.
    发明授权
    Device and method for updating a pointer value by switching between pointer values 有权
    通过切换指针值来更新指针值的装置和方法

    公开(公告)号:US06665770B2

    公开(公告)日:2003-12-16

    申请号:US10057878

    申请日:2002-01-29

    申请人: Yoshihiro Koga

    发明人: Yoshihiro Koga

    IPC分类号: G06F932

    摘要: In order to enable a pointer register device including registers called shadow registers to conduct updating operation rapidly by arithmetic operation of a pointer value between the registers, a front/back register set includes a first register and a second register. A switch control section allows a read select switch and a write select switch to select different registers. When the read select switch selects the first register and the write select switch selects the second register, the sum obtained by an adder can be stored in the second register while retaining the pointer value of the first register. In this case, the pointer value need not be transferred between the registers.

    摘要翻译: 为了使包括被称为影子寄存器的寄存器的指针寄存器装置通过寄存器之间的指针值的算术运算来快速地进行更新操作,前/后寄存器组包括第一寄存器和第二寄存器。 开关控制部分允许读选择开关和写选择开关选择不同的寄存器。 当读选择开关选择第一寄存器并且写选择开关选择第二寄存器时,由加法器获得的和可以保存在第二寄存器中,同时保留第一寄存器的指针值。 在这种情况下,不需要在寄存器之间传送指针值。

    Method for providing single step log-on access to a differentiated computer network
    2.
    发明授权
    Method for providing single step log-on access to a differentiated computer network 失效
    提供对差分计算机网络的单步登录访问的方法

    公开(公告)号:US06643782B1

    公开(公告)日:2003-11-04

    申请号:US09882256

    申请日:2001-06-14

    IPC分类号: G06F932

    CPC分类号: H04L63/0815 G06F21/41

    摘要: A method for providing single step log-on access for a subscriber to a computer network. The computer network is differentiated into public and private areas. Secure access to the private areas is provided by a Service Selection Gateway (SSG) Server, introduced between a conventional Network Access Server (NAS) and an Authentication Authorization and Accounting (AAA) Server. The SSG Server intercepts and manipulates packets of data exchanged between the NAS and the AAA Server to obtain all the information it needs to automatically log the user on when the user logs on to the NAS. An authorized user is thus spared the task of having to re-enter username and password data or launch a separate application in order to gain secure access to private areas of the network.

    摘要翻译: 一种用于为计算机网络的用户提供单步登录访问的方法。 计算机网络被划分为公共和私人领域。 在常规网络接入服务器(NAS)和认证授权和计费(AAA)服务器之间引入的服务选择网关(SSG)服务器提供对私有区域的安全访问。 SSG服务器拦截和操纵NAS和AAA服务器之间交换的数据包,以获取用户登录NAS时自动登录用户所需的所有信息。 因此,授权用户不必重新输入用户名和密码数据或启动单独的应用程序,以便获得对网络私有区域的安全访问。

    Decoupled fetch-execute engine with static branch prediction support
    3.
    发明授权
    Decoupled fetch-execute engine with static branch prediction support 失效
    具有静态分支预测支持的解耦抓取执行引擎

    公开(公告)号:US06523110B1

    公开(公告)日:2003-02-18

    申请号:US09360054

    申请日:1999-07-23

    IPC分类号: G06F932

    摘要: There is provided a decoupled fetch-execute engine with static branch prediction support. A method for prefetching targets of branch instructions in a computer processing system having instruction fetch decoupled from an execution pipeline includes the step of generating a prepare-to-branch (PBR) operation. The PBR operation includes address bits corresponding to a branch paired thereto and address bits corresponding to an expected target of the branch. The execution of the PBR operation is scheduled prior to execution of the paired branch to enforce a desired latency therebetween. Upon execution of the PBR operation, it is determined whether the paired branch is available using the address bits of the PBR operation corresponding to the paired branch. When the paired branch is available, the expected branch target is fetched using the address bits of the PBR operation corresponding to the expected branch target.

    摘要翻译: 提供了一种具有静态分支预测支持的解耦获取执行引擎。 在具有从执行流水线分离的指令提取的计算机处理系统中预取分支指令的目标的方法包括生成准备到分支(PBR)操作的步骤。 PBR操作包括对应于与其配对的分支的地址位和对应于分支的预期目标的地址位。 在执行配对分支之前调度PBR操作的执行以在它们之间施加期望的等待时间。 在执行PBR操作时,使用对应于配对分支的PBR操作的地址位确定配对分支是否可用。 当配对分支可用时,使用对应于预期分支目标的PBR操作的地址位来获取期望的分支目标。

    Stack pointer with post increment/decrement allowing selection from parallel read/write address outputs
    4.
    发明授权
    Stack pointer with post increment/decrement allowing selection from parallel read/write address outputs 有权
    具有后增/减功能的堆栈指针,允许从并行读/写地址输出中进行选择

    公开(公告)号:US06345353B2

    公开(公告)日:2002-02-05

    申请号:US09772653

    申请日:2001-01-30

    IPC分类号: G06F932

    摘要: The stack pointer is used for generating the next unutilized location in the stack memory device in order to indicate where a current value in the program counter is to be written. The stack pointer also generates a directly preceding location to the next unutilized location in order to read the last value of the program counter that was written to the stack memory device. The stack pointer will select the next unutilized location in the stack memory device for a write operation and the directly preceding location to the next unutilized location in the stack memory device for a read operation. The stack pointer will further perform either a post increment or post decrement operation on the next unutilized location in the stack memory device after execution of a current instruction.

    摘要翻译: 堆栈指针用于在堆栈存储器件中产生下一个未使用的位置,以指示要写入程序计数器的当前值的位置。 为了读取写入堆栈存储器件的程序计数器的最后一个值,堆栈指针还会向下一个未使用位置生成一个直接的前一个位置。 堆栈指针将选择堆栈存储器设备中的下一个未使用的位置进行写入操作,并且在堆栈存储器设备中的下一个未使用位置的直接前一位置进行读取操作。 在执行当前指令之后,堆栈指针将进一步对堆栈存储器设备中的下一未使用位置执行后递增或后递减操作。

    Method for providing single step log-on access to a differentiated computer network
    5.
    发明授权
    Method for providing single step log-on access to a differentiated computer network 有权
    提供对差分计算机网络的单步登录访问的方法

    公开(公告)号:US06311275B1

    公开(公告)日:2001-10-30

    申请号:US09128990

    申请日:1998-08-03

    IPC分类号: G06F932

    CPC分类号: H04L63/0815 G06F21/41

    摘要: A method for providing single step log-on access for a subscriber to a computer network. The computer network is differentiated into public and private areas. Secure access to the private areas is provided by a Service Selection Gateway (SSG) Server, introduced between a conventional Network Access Server (NAS) and an Authentication Authorization and Accounting (AAA) Server. The SSG Server intercepts and manipulates packets of data exchanged between the NAS and the AAA Server to obtain all the information it needs to automatically log the user on when the user logs on to the NAS. An authorized user is thus spared the task of having to re-enter username and password data or launch a separate application in order to gain secure access to private areas of the network.

    摘要翻译: 一种用于为计算机网络的用户提供单步登录访问的方法。 计算机网络被划分为公共和私人领域。 在常规网络接入服务器(NAS)和认证授权和计费(AAA)服务器之间引入的服务选择网关(SSG)服务器提供对私有区域的安全访问。 SSG服务器拦截和操纵NAS和AAA服务器之间交换的数据包,以获取用户登录NAS时自动登录用户所需的所有信息。 因此,授权用户不必重新输入用户名和密码数据或启动单独的应用程序,以便获得对网络私有区域的安全访问。

    Memory address generator capable of row-major and column-major sweeps
    6.
    发明授权
    Memory address generator capable of row-major and column-major sweeps 有权
    内存地址发生器能够进行主扫描和列主扫描

    公开(公告)号:US06233669B1

    公开(公告)日:2001-05-15

    申请号:US09183172

    申请日:1998-10-30

    IPC分类号: G06F932

    CPC分类号: G11C29/20 G11C8/00 G11C8/12

    摘要: An improved method and structure for generating addresses of a memory array facilitates the testing of a memory cell by generating the address of any adjacent memory cell to the memory cell under test. The address generation provides for movement to any adjacent memory cell, in any direction, including north, south, east, west, northeast, northwest, southeast, and southwest. The address of any memory cell, even the address of a non-adjacent memory cell, may be selectively generated by exercising a programmable initialization feature.

    摘要翻译: 用于产生存储器阵列的地址的改进的方法和结构便于通过向被测试的存储器单元生成任何相邻存储器单元的地址来测试存储器单元。 地址生成提供向包括北,南,东,西,东北,西北,东南,西南在内的任何方向移动到任何相邻的存储单元。 可以通过锻炼可编程初始化特征来选择性地生成任何存储器单元的地址,甚至非相邻存储器单元的地址。

    Data processing device with relative jump instruction
    7.
    发明授权
    Data processing device with relative jump instruction 失效
    具有相对跳转指令的数据处理设备

    公开(公告)号:US06182209B2

    公开(公告)日:2001-01-30

    申请号:US09135490

    申请日:1998-08-17

    IPC分类号: G06F932

    摘要: In an instruction a relative jump distance is expressed as a number of instructions rather than as a number of addresses. Instructions have various lengths. After encountering the instruction the processing device loads the following instructions but suppresses execution of a set of instructions that consists of the number of instructions expressed in the relative jump instruction.

    摘要翻译: 在指令中,相对跳跃距离被表示为指令的数量而不是地址的数量。 说明书有不同的长度。 在遇到指令之后,处理设备加载以下指令,但是抑制由在相对跳转指令中表达的指令数量组成的指令集的执行。

    Static branch prediction mechanism for conditional branch instructions
    8.
    发明授权
    Static branch prediction mechanism for conditional branch instructions 有权
    条件分支指令的静态分支预测机制

    公开(公告)号:US06571331B2

    公开(公告)日:2003-05-27

    申请号:US09825435

    申请日:2001-04-03

    IPC分类号: G06F932

    CPC分类号: G06F9/3846 G06F9/3848

    摘要: An apparatus and method are provided for accurately predicting the outcome of branch instructions prior to their execution by a pipeline microprocessor. The apparatus has a static branch predictor, a mandatory signal, and a biased prediction correlator. The static branch predictor provides a predicted outcome for a branch instruction, and determines if the branch instruction is a biased outcome conditional branch instruction. The mandatory signal is coupled to the static branch predictor and indicates whether or not the branch instruction is the biased outcome conditional branch instruction, thereby indicating whether or not the predicted outcome takes precedence over a dynamic branch prediction for the branch instruction. The biased prediction correlator is coupled to the static branch predictor and the mandatory signal. The biased prediction correlator receives the predicted outcome, the mandatory signal, and the dynamic branch prediction. The biased prediction correlator favors the dynamic branch prediction over the predicted outcome. If the mandatory signal indicates that the branch instruction is a biased outcome conditional branch instruction, however, then the biased prediction correlator favors the predicted outcome over the dynamic branch prediction.

    摘要翻译: 提供了一种装置和方法,用于在流水线微处理器执行之前准确预测分支指令的结果。 该装置具有静态分支预测器,强制信号和偏置预测相关器。 静态分支预测器提供分支指令的预测结果,并确定分支指令是否是有偏转的结果条件分支指令。 强制信号耦合到静态分支预测器,并指示分支指令是否是有偏转的结果条件分支指令,从而指示预测结果是否优先于分支指令的动态分支预测。 偏置预测相关器耦合到静态分支预测器和强制信号。 偏置预测相关器接收预测结果,强制信号和动态分支预测。 偏好预测相关器有利于预测结果的动态分支预测。 然而,如果强制信号指示分支指令是有偏转的结果条件分支指令,则偏置预测相关器有利于动态分支预测的预测结果。

    Method and apparatus for predicting loop exit branches
    9.
    发明授权
    Method and apparatus for predicting loop exit branches 有权
    用于预测环路出口分支的方法和装置

    公开(公告)号:US06438682B1

    公开(公告)日:2002-08-20

    申请号:US09169866

    申请日:1998-10-12

    IPC分类号: G06F932

    CPC分类号: G06F9/325

    摘要: A loop branch prediction system is provided to predict a final iteration of a loop and resteer an associated fetch module to an appropriate target address. The loop prediction system includes a counter and an end of loop (EOL) module. In one mode, the counter tracks loop branches in process. When a termination condition is detected, the counter switches to a second mode to track the number of loop branches still to be issued. The EOL module compares the number of loop branches still to be issued with one or more threshold values and generates a resteer signal when a match is detected.

    摘要翻译: 提供循环分支预测系统以预测循环的最终迭代并将相关联的获取模块修复到适当的目标地址。 环路预测系统包括计数器和结束循环(EOL)模块。 在一种模式下,计数器跟踪正在进行的循环分支。 当检测到终止条件时,计数器切换到第二模式以跟踪仍然发布的循环分支的数量。 EOL模块将仍然要发出的环路分支数与一个或多个阈值进行比较,并在检测到匹配时产生一个恢复信号。

    Reliable branch predictions for real-time applications
    10.
    发明授权
    Reliable branch predictions for real-time applications 有权
    可靠的分支预测实时应用程序

    公开(公告)号:US06430682B1

    公开(公告)日:2002-08-06

    申请号:US09151981

    申请日:1998-09-11

    申请人: Harry Dwyer, III

    发明人: Harry Dwyer, III

    IPC分类号: G06F932

    摘要: Reliable branch predictions for real-time applications reduce both conditional branch execution time and uncertainties associated with their prediction in a computer implemented application. One method ensures that certain conditional branches are always correctly predicted, effectively converting them to jump instructions during program execution. Another method exploits the fact that some conditional branches always branch in the same direction within a task invocation, although that direction may vary across invocations. These methods improve computer processor utilization and performance.

    摘要翻译: 用于实时应用程序的可靠分支预测减少了在计算机实现的应用程序中与其预测相关的条件分支执行时间和不确定性。 一种方法确保某些条件分支总是正确预测,在程序执行期间有效地将它们转换为跳转指令。 另一种方法利用了一些事实,即一些条件分支总是在任务调用中以相同的方向分支,尽管该方向可能在调用之间变化。 这些方法提高了计算机处理器的利用率和性能。