公开(公告)号：US10923583B2

公开(公告)日：2021-02-16

申请号：US16601609

申请日：2019-10-15

Applicant: University of Electronic Science and Technology of China

Inventor： Zehong Li ,  Xin Peng ,  Yishang Zhao ,  Min Ren ,  Bo Zhang

IPC: H01L29/78 ,  H01L29/739 ,  H01L29/10 ,  H01L29/423

Abstract: The present invention relates to the technical field of power semiconductor devices, particularly to an insulated gate bipolar transistor with a MOS controllable hole path. According to the present invention, a MOS controllable gate structure formed by a gate dielectric layer, a MOS control gate electrode and a P-type MOS channel region are embedded in a P+ floating p-body region of the conventional IGBT structure. The MOS region is equivalent to a switch controlled by a gate voltage. When the device is turned on under a forward voltage, the potential of the p-body region is floated to store holes, reducing the saturation conduction voltage drop of the device. Under the condition of turn-off and short-circuit, the hole extracting path is provided and the Miller capacitance is lowered, thereby lowering the turn-off losses and enhancing the short-circuit withstand capability.

公开(公告)号：US20210041762A1

公开(公告)日：2021-02-11

申请号：US16988648

申请日：2020-08-08

Applicant: University of Electronic Science and Technology of China

Inventor： Mao Ye ,  Xiaoxi Chen ,  Guangyong Li ,  Yalei Zhang

IPC: G02F1/29

Abstract: An optical device includes a first electrode layer, a first alignment layer, a liquid crystal layer, a second alignment layer, and a second electrode layer being arranged in turn along a light transmission direction; wherein the first electrode layer comprises a first electrode, a second electrode, and a first impedance membrane arranged between the first electrode and the second electrode, and the first electrode and the second electrode are respectively arranged on opposite ends of the first impedance membrane; the second electrode layer has a structure similar to that of the first electrode layer. The four electrodes form a light transmission hole being shaped as a parallelogram. The present invention solves the problem that the focal length of the liquid crystal lens cannot be accurately adjusted due to the instability of the impedance of the impedance membrane of the present liquid crystal lens.

公开(公告)号：US10885604B2

公开(公告)日：2021-01-05

申请号：US16435465

申请日：2019-06-08

Applicant: University of Electronic Science and Technology of China

Inventor： Wuhuang Huang ,  Pan Wang ,  Jun Jiang ,  Peng Ye ,  Kuojun Yang ,  Lianping Guo ,  Hao Zeng ,  Shuo Wang ,  Jian Gao

IPC: G01R13/02 ,  G01R13/40 ,  G06T11/20 ,  G06T1/60 ,  G06F16/22 ,  G06F3/06

Abstract: The present invention provides a method for 3D waveform mapping of full-parallel structure, first, a 3D waveform mapping database is created according to the size of a 3D waveform image, the number of bits of probability value and the ADC's resolution of data acquisition module, then the 3D waveform mapping database is divided into Mt×Ma independent mapping storage areas along the time axis and the amplitude axis, and each independent mapping storage area is assigned a RAM, then RAMs are selected and addresses are calculated based on the sampling values and the structure of created 3D waveform mapping database, finally, parallel mappings are performed simultaneously on the time axis and the amplitude axis according to the selected RAMs and calculated addresses. Thus, the mapping time are shorten, especially in vector mapping mode, several RAMs are used for mapping, so the WCR of DSO is improved.

公开(公告)号：US20200381705A1

公开(公告)日：2020-12-03

申请号：US16955064

申请日：2019-09-20

Applicant: University of Electronic Science and Technology of China

Inventor： Jingze LI ,  Weishang JIA ,  Zeyu YAO ,  Yuchi LIU ,  Siji QU ,  Chao LI

IPC: H01M4/04 ,  H01M4/38 ,  H01M10/0525 ,  C22C1/02

Abstract: A method for preparing a lithium alloy as an anode material includes the following steps: heating lithium metal into a molten state in an environment with a dew point not higher than −50° C. and an oxygen content not higher than 10 ppm; adding a transition metal to the molten lithium metal, maintaining the temperature for 5-15 minutes, and uniformly mixing to form a molten alloy; cooling the molten alloy to room temperature to obtain the lithium alloy as the anode material. The preparation method of the present invention is simple and feasible with less cost. The prepared lithium alloy as the anode material can effectively improve the coulombic efficiency and cycle lifespan of the lithium battery.

公开(公告)号：US20200235254A1

公开(公告)日：2020-07-23

申请号：US16486109

申请日：2018-02-16

Applicant: INSTITUT NATIONAL DE LA RECHERCHE SCIENTIFIQUE ,  UNIVERSITY OF ELECTRONIC SCIENCE AND TECHNOLOGY OF CHINA

Inventor： Yufeng ZHOU ,  Daniele BENETTI ,  Xin TONG ,  Lei JIN ,  Zhiming M. WANG ,  Dongling MA ,  Haiguang ZHAO ,  Federico ROSEI

IPC: H01L31/055 ,  C09K11/65 ,  C09K11/02 ,  C08L29/04 ,  C08L33/10 ,  C08L39/06

Abstract: A luminescent solar concentrator (LSC) comprising a metal-free emitter. The emitter may for example be carbon-based. In particular, the emitter may comprise colloidal carbon quantum dots, also called C-dots or C-QDs or C-dots. In embodiments of the invention, the surface of the C-dots is modified.

公开(公告)号：US20200235231A1

公开(公告)日：2020-07-23

申请号：US16601609

申请日：2019-10-15

Applicant: University of Electronic Science and Technology of China

Inventor： Zehong LI ,  Xin PENG ,  Yishang ZHAO ,  Min REN ,  Bo ZHANG

IPC: H01L29/739 ,  H01L29/423 ,  H01L29/10

Abstract: The present invention relates to the technical field of power semiconductor devices, particularly to an insulated gate bipolar transistor with a MOS controllable hole path. According to the present invention, a MOS controllable gate structure formed by a gate dielectric layer, a MOS control gate electrode and a P-type MOS channel region are embedded in a P+ floating p-body region of the conventional IGBT structure. The MOS region is equivalent to a switch controlled by a gate voltage. When the device is turned on under a forward voltage, the potential of the p-body region is floated to store holes, reducing the saturation conduction voltage drop of the device. Under the condition of turn-off and short-circuit, the hole extracting path is provided and the Miller capacitance is lowered, thereby lowering the turn-off losses and enhancing the short-circuit withstand capability.

公开(公告)号：US20200220063A1

公开(公告)日：2020-07-09

申请号：US16419007

申请日：2019-05-22

Applicant: University of Electronic Science and Technology of China

Inventor： Jing Jiang ,  Yan Pan ,  Yi Niu ,  Ting Zhou ,  Rui Zhang ,  Xinrui He ,  Chao Wang

IPC: H01L35/16 ,  C01G5/00

Abstract: A low-temperature high-performance thermoelectric material possesses a chemical formula of (AgyCu2−y)1−xTe1−zSez, wherein −0.025≤x≤0.075, 0.6≤y≤1.4, 0

公开(公告)号：US10607987B2

公开(公告)日：2020-03-31

申请号：US16255851

申请日：2019-01-24

Applicant: University of Electronic Science and Technology of China

Inventor： Ming Qiao ,  Song Pu ,  Bo Zhang

IPC: H01L27/06 ,  H01L21/8258 ,  H01L21/784

Abstract: A BIPOLAR-CMOS-DMOS (BCD) semiconductor device and manufacturing method, which can integrate a Junction Field-Effect Transistor (JFET), two classes of Vertical Double-diffusion Metal Oxide Semiconductor (VDMOS), a Lateral Insulated-Gate Bipolar Transistor (LIGBT) and seven kinds of Laterally Diffused Metal Oxide Semiconductor (LDMOS), a low-voltage Negative channel Metal Oxide Semiconductor (NMOS), a low-voltage Positive channel Metal Oxide Semiconductor (PMOS), a low-voltage Negative-Positive-Negative (NPN) transistor and a low-voltage Positive-Negative-Positive (PNP) transistor, and a diode in the same chip. Bipolar devices in the analog circuit, power components in the switch circuit, Complementary Metal Oxide Semiconductor (CMOS) devices in the logic circuit and other kinds of lateral and vertical components are integrated. This present invention saves costs at the same time greatly improve chip integration. The manufacturing method of the present invention is simple, and the difficulty of process is relatively less.

公开(公告)号：US20200052687A1

公开(公告)日：2020-02-13

申请号：US16455803

申请日：2019-06-28

Applicant: University of Electronic Science and Technology of China

Inventor： Xin MING ,  Li HU ,  Xuan ZHANG ,  Su PAN ,  Chunqi ZHANG ,  Yao QIN ,  Zhiwen ZHANG ,  Yangli XIN ,  Zhuo WANG ,  Bo ZHANG

IPC: H03K17/06 ,  H03K17/16

Abstract: A switch bootstrap charging circuit suitable for a gate drive circuit of a GaN power device includes a high-voltage MOSFET, a low-voltage MOSFET, a high-voltage MOSFET control module, and a low-voltage MOSFET control module. The low-voltage MOSFET is a PMOS transistor, and the source of the low-voltage MOSFET is connected to the power supply voltage. The drain of the high-voltage MOSFET serves as an output terminal of the switch bootstrap charging circuit. The low-voltage MOSFET control module and the high-voltage MOSFET control module generate a gate drive signal of the low-voltage MOSFET and a gate drive signal of the high-voltage MOSFET according to the gate drive signal of the lower power transistor.

公开(公告)号：US10553926B2

公开(公告)日：2020-02-04

申请号：US15739169

申请日：2017-07-19

Applicant: University of Electronic Science and Technology of China

Inventor： Yong Xiang ,  Cong Wang ,  Xuesong Feng ,  Fenfen Liu

IPC: H01P7/04 ,  H01P7/10 ,  H01P7/06

Abstract: The present disclosure is related to the microwave measuring field, and in particularly to a coaxial resonant cavity and system and method for measuring the dielectric constant of material. The coaxial resonant cavity includes a coupling mechanism and a cavity body. The coupling mechanism is accommodated in the cavity body for exciting or coupling microwaves inside the cavity body. The coaxial resonant cavity further includes a probe extending out of the cavity body and being coaxial with the cavity body. The cavity body is shaped as an annular column, and a ratio of an outer radius of the annular column to an inner radius of the annular column is (3-5):1. The present disclosure still provides a system and method for measuring the dielectric constant of material using the coaxial resonant cavity.