公开(公告)号：US20200052687A1

公开(公告)日：2020-02-13

申请号：US16455803

申请日：2019-06-28

Applicant: University of Electronic Science and Technology of China

Inventor： Xin MING ,  Li HU ,  Xuan ZHANG ,  Su PAN ,  Chunqi ZHANG ,  Yao QIN ,  Zhiwen ZHANG ,  Yangli XIN ,  Zhuo WANG ,  Bo ZHANG

IPC: H03K17/06 ,  H03K17/16

Abstract: A switch bootstrap charging circuit suitable for a gate drive circuit of a GaN power device includes a high-voltage MOSFET, a low-voltage MOSFET, a high-voltage MOSFET control module, and a low-voltage MOSFET control module. The low-voltage MOSFET is a PMOS transistor, and the source of the low-voltage MOSFET is connected to the power supply voltage. The drain of the high-voltage MOSFET serves as an output terminal of the switch bootstrap charging circuit. The low-voltage MOSFET control module and the high-voltage MOSFET control module generate a gate drive signal of the low-voltage MOSFET and a gate drive signal of the high-voltage MOSFET according to the gate drive signal of the lower power transistor.

公开(公告)号：US20190004553A1

公开(公告)日：2019-01-03

申请号：US16026081

申请日：2018-07-03

Applicant: University of Electronic Science and Technology of China ,  Institute of Electronic and Information Engineering of UESTC in Guangdong

Inventor： Xin MING ,  Jiahao ZHANG ,  Wenlin ZHANG ,  Di GAO ,  Xuan ZHANG ,  Zhuo WANG ,  Bo ZHANG

IPC: G05F1/575 ,  H03F3/30 ,  H03F3/45 ,  H03F3/08

CPC classification number: G05F1/575 ,  H03F3/082 ,  H03F3/3061 ,  H03F3/45183 ,  H03F3/45264 ,  H03F3/45269 ,  H03F3/45273

Abstract: A ripple pre-amplification based fully integrated LDO pertains to the technical field of power management. The positive input terminal of a transconductance amplifier is connected to a reference voltage Vref, and the negative input terminal of the transconductance amplifier is connected to the feedback voltage Vfb. The output terminal of the transconductance amplifier is connected to the negative input terminal of a transimpedance amplifier and the negative input terminal of an error amplifier. The positive input terminal of the transimpedance amplifier is connected to the ground GND, and the output terminal of the transimpedance amplifier is connected to the positive input terminal of the error amplifier. The gate terminal of the power transistor MP is connected to the output terminal of the error amplifier, the source terminal of the power transistor MP is connected to an input voltage VIN, and the drain terminal of the power transistor MP is grounded.

公开(公告)号：US20180046212A1

公开(公告)日：2018-02-15

申请号：US15387678

申请日：2016-12-22

Applicant: UNIVERSITY OF ELECTRONIC SCIENCE AND TECHNOLOGY OF CHINA

Inventor： Xin MING ,  Tiansheng LI ,  Jun XU ,  Zhuo WANG ,  Bo ZHANG

IPC: G05F1/575

CPC classification number: G05F1/575 ,  G05F1/563 ,  G05F1/565

Abstract: A low-dropout regulator, including: a dynamic pole tracking circuit having an active load, a voltage-to-current converter, a current amplifier, a bias circuit, a regulating transistor, a first feedback resistor, a second feedback resistor, and a first capacitor. The dynamic pole tracking circuit includes: a first PMOS, a second PMOS, a first resistor, and a second resistor. The voltage-to-current converter includes: a first NMOS, a second NMOS, a third NMOS, a fourth NMOS, a fifth NMOS, a sixth NMOS, a seventh NMOS, an eighth NMOS, a third PMOS, a fourth PMOS, a seventh PMOS, an eighth PMOS. The current amplifier includes: a fifth PMOS, a sixth PMOS, a ninth NMOS, a tenth NMOS, and a third resistor. The bias circuit includes: a ninth PMOS, a tenth PMOS, an eleventh PMOS, an eleventh NMOS, a twelfth NMOS, a thirteenth NMOS, and a fourth resistor.

公开(公告)号：US20210305051A1

公开(公告)日：2021-09-30

申请号：US17004031

申请日：2020-08-27

Applicant: University of Electronic Science and Technology of China

Inventor： Ming QIAO ,  Shida DONG ,  Zhengkang WANG ,  Dong FANG ,  Zhuo WANG ,  Bo ZHANG

IPC: H01L21/28 ,  H01L29/78 ,  H01L29/10 ,  H01L29/40 ,  H01L29/417 ,  H01L29/423 ,  H01L21/765 ,  H01L29/66

Abstract: A metal wiring method for reducing gate resistance of a narrow control gate structure, wherein the gate structure is etched with first gate electrodes and second gate electrodes at regular intervals and kept with complete gate electrodes at regular intervals, thereby constituting a structure in which the first and second gate electrodes and the complete gate electrodes are spaced apart. A first contact hole is etched on the complete gate electrode to draw out metal as a first metal layer. A second contact hole is etched on a source region and a split gate to draw out metal as a second metal layer. These two metal layers are separated by a dielectric layer. A multi-point contact of the first layer of metal with the gate electrode in a Y direction reduces the gate resistance caused by an excessively long path in the Y direction of a control gate electrode.

公开(公告)号：US20180164842A1

公开(公告)日：2018-06-14

申请号：US15599484

申请日：2017-05-19

Applicant: University of Electronic Science and Technology of China

Inventor： Zekun ZHOU ,  Yao WANG ,  Jianwen CAO ,  Hongming YU ,  Yunkun WANG ,  Anqi WANG ,  Zhuo WANG ,  Bo ZHANG

IPC: G05F1/46 ,  G05F3/24 ,  G05F3/16 ,  H02J7/00

CPC classification number: G05F1/46 ,  G05F3/16 ,  G05F3/242 ,  H02J7/0047 ,  H02J2007/0095

Abstract: A resistorless CMOS low power voltage reference circuit is provided. The start-up circuit is used to prevent the circuit to stay in the zero state and stop working when the circuit gets out of the zero state. The self-biased VPTAT generating circuit generate the voltage VPTAT which has positive temperature coefficient. The square-law current generating circuit generates a square-law current which is proportional to μT2 through the VPTAT. Finally, the reference voltage VREF is obtained by introducing the square-law current into the reference voltage output circuit. The reference voltage VREF of this application can realize approximative zero temperature coefficient in the temperature range of −40° C.˜ 100° C. This application improves temperature characteristic which may be poorer due to temperature nonlinearity of carrier mobility based on the traditional subthreshold reference. This application can reduce the power consumption from μW level to nW level and realize low power consumption.

公开(公告)号：US20180157283A1

公开(公告)日：2018-06-07

申请号：US15690290

申请日：2017-08-30

Applicant: University of Electronic Science and Technology of China

Inventor： Xin MING ,  Di GAO ,  Jiahao ZHANG ,  Xuan ZHANG ,  Xiuling WEI ,  Yao WANG ,  Zhuo WANG ,  Bo ZHANG

IPC: G05F1/575 ,  H03F3/45

CPC classification number: G05F1/575 ,  H03F3/4521 ,  H03F2203/45288

Abstract: A low-dropout regulator with super transconductance structure relates to the field of power management technology. The super-transconductance structure refers to the circuit structure in which the voltage signal is converted into a current signal and amplified with a high magnification. The error amplifier EA in the present invention uses the super transconductance structure. The differential input pair of the error amplifier EA samples the difference between the feedback voltage VFB and the dynamic reference voltage VREF1. The difference is converted into a small signal current, which goes through a first-stage of current mirror to be amplified by K1, and through a second-stage of current mirror to be amplified by K2. The amplified signal is used to regulate the gate of the adjustment transistor MP. The error amplifier EA with the super transconductance structure is used to expand the bandwidth of the error amplifier EA.