公开(公告)号：US07639522B2

公开(公告)日：2009-12-29

申请号：US11855525

申请日：2007-09-14

申请人： Woo-yeong Cho ,  Du-eung Kim ,  Ki-sung Kim

发明人： Woo-yeong Cho ,  Du-eung Kim ,  Ki-sung Kim

IPC分类号： G11C11/00

CPC分类号： G11C11/56 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0064 ,  G11C13/0069 ,  G11C2013/0078

摘要： Disclosed is a method of driving a multi-level variable resistive memory device. A method of driving a multi-level variable resistive memory device includes supplying a write current to a variable resistive memory cell so as to change resistance of the variable resistive memory cell, verifying whether or not changed resistance enters a predetermined resistance window, and supplying a write current having an increased or decreased amount from the write current supplied most recently on the basis of the verification result so as to change resistance of the variable resistive memory cell.

摘要翻译： 公开了一种驱动多电平可变电阻存储器件的方法。 一种驱动多电平可变电阻存储器件的方法包括向可变电阻存储单元提供写入电流，以便改变可变电阻存储单元的电阻，验证改变电阻是否进入预定电阻窗， 基于验证结果从最近提供的写入电流中增加或减少量的写入电流，以便改变可变电阻存储单元的电阻。

公开(公告)号：US07978490B2

公开(公告)日：2011-07-12

申请号：US11892851

申请日：2007-08-28

申请人： Kwang-jin Lee ,  Du-eung Kim

发明人： Kwang-jin Lee ,  Du-eung Kim

IPC分类号： G11C15/00

CPC分类号： G11C15/046 ,  G11C13/0004

摘要： According to an example embodiment, a CAM cell included in a CAM may include a phase change memory device, a connector, and/or a developer. The phase change memory device may be configured to store data. The phase change memory device may have a resistance that may be varied according to the logic level of the stored data. The connector may be configured to control writing data to the phase change memory device and reading data from the phase change memory device. The developer may be configured to control reading data from the phase change memory device in a search mode in which the data stored in the phase change memory device is compared to the search data.

摘要翻译： 根据示例实施例，CAM中包括的CAM单元可以包括相变存储器件，连接器和/或显影器。 相变存储器件可以被配置为存储数据。 相变存储器件可以具有可以根据存储的数据的逻辑电平而改变的电阻。 连接器可以被配置为控制向相变存储器件写入数据并从相变存储器件读取数据。 开发者可以被配置为在存储在相变存储器件中的数据与搜索数据进行比较的搜索模式中控制从相变存储器件读取数据。

公开(公告)号：US07668006B2

公开(公告)日：2010-02-23

申请号：US11902704

申请日：2007-09-25

申请人： Kwang-jin Lee ,  Du-eung Kim ,  Chang-soo Lee ,  Qi Wang

发明人： Kwang-jin Lee ,  Du-eung Kim ,  Chang-soo Lee ,  Qi Wang

IPC分类号： G11C11/00

CPC分类号： G11C8/16 ,  G11C13/0004 ,  G11C2213/74 ,  G11C2213/79

摘要： A multi-port phase change random access memory (PRAM) cell, includes a PRAM element including a phase change material, a writing controller configured to operate in correspondence with a writing word line, the writing controller connecting a writing bit line to the PRAM element, and a reading controller configured to operate in correspondence with a reading word line, the reading controller connecting the PRAM element to a reading bit line.

摘要翻译： 多端口相变随机存取存储器（PRAM）单元包括：包括相变材料的PRAM元件，配置成与写入字线对应地进行操作的写入控制器，写入控制器将写入位线连接到PRAM元件 以及读取控制器，被配置为与读取字线对应地操作，读取控制器将PRAM元件连接到读取位线。

公开(公告)号：US07352616B2

公开(公告)日：2008-04-01

申请号：US11319602

申请日：2005-12-29

申请人： Sang-beom Kang ,  Du-eung Kim ,  Hyung-rok Oh ,  Kwang-jin Lee

发明人： Sang-beom Kang ,  Du-eung Kim ,  Hyung-rok Oh ,  Kwang-jin Lee

IPC分类号： G11C11/00

CPC分类号： G11C5/145 ,  G11C8/08 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0028 ,  G11C13/0038 ,  G11C13/0069 ,  G11C2013/009

摘要： A phase change random access memory on aspect includes a memory cell array block including a plurality of phase change memory cells, a column decoder, a row decoder, a column selector, and a write driver. The memory further includes a write boosting unit having a plurality of internal charge pumps which boost a first voltage to generate a write driving voltage which drives the write driver, where the number of internal charge pumps that are activated during a write operation is varied according to a number of phase change memory cells which are selected during the write operation. The memory still further includes a column boosting unit which boosts the first voltage to generate a column driving voltage which drives the column decoder, and a row boosting unit which boosts the first voltage to generate a row driving voltage which drives the row decoder.

摘要翻译： 一方面的相变随机存取存储器包括包括多个相变存储器单元，列解码器，行解码器，列选择器和写驱动器的存储单元阵列块。 存储器还包括具有多个内部电荷泵的写入升压单元，该多个内部电荷泵升压第一电压以产生驱动写入驱动器的写入驱动电压，其中在写入操作期间被激活的内部电荷泵的数量根据 在写入操作期间选择的多个相变存储器单元。 存储器还包括列升压单元，其升高第一电压以产生驱动列解码器的列驱动电压;以及行升压单元，其升高第一电压以产生驱动行解码器的行驱动电压。

公开(公告)号：US20070097741A1

公开(公告)日：2007-05-03

申请号：US11319602

申请日：2005-12-29

申请人： Sang-beom Kang ,  Du-eung Kim ,  Hyung-rok Oh ,  Kwang-jin Lee

发明人： Sang-beom Kang ,  Du-eung Kim ,  Hyung-rok Oh ,  Kwang-jin Lee

IPC分类号： G11C11/00

CPC分类号： G11C5/145 ,  G11C8/08 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0028 ,  G11C13/0038 ,  G11C13/0069 ,  G11C2013/009

摘要： A phase change random access memory on aspect includes a memory cell array block including a plurality of phase change memory cells, a column decoder, a row decoder, a column selector, and a write driver. The memory further includes a write boosting unit having a plurality of internal charge pumps which boost a first voltage to generate a write driving voltage which drives the write driver, where the number of internal charge pumps that are activated during a write operation is varied according to a number of phase change memory cells which are selected during the write operation. The memory still further includes a column boosting unit which boosts the first voltage to generate a column driving voltage which drives the column decoder, and a row boosting unit which boosts the first voltage to generate a row driving voltage which drives the row decoder.

摘要翻译： 一方面的相变随机存取存储器包括包括多个相变存储器单元，列解码器，行解码器，列选择器和写驱动器的存储单元阵列块。 存储器还包括具有多个内部电荷泵的写入升压单元，该多个内部电荷泵升压第一电压以产生驱动写入驱动器的写入驱动电压，其中在写入操作期间被激活的内部电荷泵的数量根据 在写入操作期间选择的多个相变存储器单元。 存储器还包括列升压单元，其升高第一电压以产生驱动列解码器的列驱动电压;以及行升压单元，其升高第一电压以产生驱动行解码器的行驱动电压。