Abstract:
A blue-phase liquid crystal panel is described which includes a first substrate, a second substrate, a blue-phase liquid crystal layer between the first substrate and the second substrate; a first electrode located on one surface of the first substrate, a first substrate coupling film located on another surface of the first substrate; a second electrode located on one surface of the second substrate; the first electrode and the second electrode forming a vertical electric field; the first substrate coupling film converting the direct front light of the backlight module into slant front light having a predetermined angle with the perpendicular electric field direction. By generating a vertical electric field, the liquid crystal panel enhances the electric field strength and uniformity of the blue-phase liquid crystal layer, and by changing the angle of light of the backlight source entering the liquid crystal cell, subjecting the incident light to phase retard, thus lowering the operating voltages of the blue-phase liquid crystal panel.
Abstract:
Embodiments of the present disclosure provide an array substrate comprising a plurality of gate lines, a plurality of data lines, and pixel regions each of which is defined by intersecting one gate line and two neighboring data lines among the plurality of gate lines and the plurality of data lines wherein two thin film transistors (TFTs) are formed at the intersections between the gate line and the two neighboring data lines in each pixel region, a first pixel electrode and a second pixel electrode are alternately arranged in each pixel region. A first thin film transistor of the two thin film transistors is coupled to the first pixel electrode, a second thin film transistor of the two thin film transistors is coupled to the second pixel electrode. The two neighboring data lines participating in defining a pixel region comprise a first data line coupling to the first thin film transistor and a second data line coupling to the second thin film transistor. Voltages having the same absolute value and opposite polarities are applied to the first pixel electrode and the second pixel electrode respectively via the first thin film transistor and the second thin film transistor.
Abstract:
A pixel circuit includes a light emitting element, a first energy storage circuit, a first driving circuit, a second driving circuit, a first driving control circuit, a second driving control circuit, a second energy storage circuit and a first control data voltage writing-in circuit; the first control data voltage writing-in circuit controls to write a first control data voltage into the third node under the control of a first writing-in control signal; both the first terminal of the first driving circuit and the first terminal of the second driving circuit are electrically connected to a power supply voltage terminal, the first driving circuit is used to drive the light emitting element under the control of a potential of the control terminal thereof, and the second driving circuit is used to drive the light emitting element under the control of a potential of the control terminal thereof.
Abstract:
A display substrate and a display device are disclosed. The display substrate includes a light-transmitting region, wherein the light-transmitting region includes a plurality of rows of effective sub-pixel sets and a plurality of main spacers, each row of the plurality of rows of effective sub-pixel sets includes a plurality of effective sub-pixel sets, each of the plurality of effective sub-pixel sets includes a plurality of effective sub-pixels, any two adjacent effective sub-pixel sets in a same row are spaced apart from each other by one main spacer, the main spacer includes at least two sub-spacers arranged along a column direction. At least two sub-spacers arranged along a row direction have different widths; and/or at least two sub-spacers of a same main sub-spacer have different widths.
Abstract:
A display method is provided. The display method includes providing a display panel having a plurality of subpixels, a respective subpixel of the plurality of subpixels including a first area, n1 number of second areas, and n2 number of third areas, the first area being between the n1 number of second areas and the n2 number of third areas, n1≥1, and n2≥1; for displaying a first frame of image, controlling light emission of the respective subpixel to be limited in the first area, m1 number of the n1 number of second areas, and m2 number of the n2 number of third areas; and for displaying a second frame of image, controlling light emission of the respective subpixel to be limited in the first area, m1′ number of the n1 number of second areas, and m2′ number of the n2 number of third areas.
Abstract:
A scan circuit is provided. The scan circuit includes a plurality of scan units in a plurality of stages, respectively. A respective scan unit of the plurality of scan units includes an output subcircuit. The output subcircuit includes a first switch transistor and a second switch transistor. A source electrode of the first switch transistor is coupled to a third terminal configured to receive a first clock signal. A drain electrode of the first switch transistor is coupled to a first output terminal configured to output a first control signal. A source electrode of the second switch transistor is coupled to a fourth terminal configured to receive the third clock signal. A drain electrode of the second switch transistor is coupled to a second output terminal configured to output a second control signal. Gate electrodes of the first switch transistor and the second switch transistor are coupled to a first node.
Abstract:
Provided are a liquid crystal lens and an electronic device. The lens includes a first and a second substrate structure; and an intermediate layer. The second substrate structure includes a second substrate; at least one electrode structure, each electrode structure including N groups of second electrodes, each group of which including M second electrodes. Orthographic projections of i-th group of second electrodes is within that of i-th intermediate portion. Each intermediate portion includes a liquid crystal layer, and j-th intermediate portion includes at least one of a first to fourth barrier walls. The liquid crystal lens is configured such that i-th intermediate portion constitutes a part of i-th stage Fresnel ring of a Fresnel zone plate, and optical paths of portions of i-th intermediate portion gradually decrease along the first direction, in a case where a predetermined voltage is between N groups of second electrodes and the first electrode.
Abstract:
A display panel includes a base substrate and a plurality of sub-pixel groups. The plurality of sub-pixel groups includes a first sub-pixel group and a second sub-pixel group. The first sub-pixel group includes two adjacent sub-pixels with a first interval therebetween, and the second sub-pixel group includes two adjacent sub-pixels with a second interval therebetween. The first interval is different from the second interval.
Abstract:
Provided are a display panel, a drive method thereof and a display apparatus. The display panel includes a plurality of scan signal lines, a plurality of data signal lines and a plurality of sub-pixels; at least one sub-pixel includes switch assembly and a display unit, wherein the switch assembly at least includes a control terminal, an input terminal and an output terminal, wherein the input terminal is connected to the data signal line, the output terminal is connected to the display unit, and the control terminal or the input terminal is connected to the scan signal line; the display panel further includes at least one switch control line, which is connected to the control terminal of the switch assembly, and the switch control line is configured to control the input terminal and the output terminal of the switch assembly to be turned on or off.
Abstract:
There are provided a pixel circuit and a method and apparatus for driving the same, an array substrate and a display apparatus. The pixel circuit includes: a driving sub-circuit and a switch sub-circuit coupled in series between a power signal terminal and a light emitting element, wherein the driving sub-circuit is configured to provide a driving signal to the light emitting element under control of a gate driving signal provided by a gate line, a data signal provided by a data line, and a power signal provided by a power signal terminal; and the switch sub-circuit is configured to control switch-on and switch-off of a signal path between the power signal terminal and the light emitting element under control of a switch signal provided by a switch signal terminal.