公开(公告)号：US12236824B2

公开(公告)日：2025-02-25

申请号：US18491531

申请日：2023-10-20

Applicant: BOE Technology Group Co., Ltd.

Inventor： Weixing Liu ,  Wei Qin ,  Kuanjun Peng ,  Tieshi Wang ,  Chunfang Zhang ,  Hui Zhang ,  Changfeng Li ,  Shunhang Zhang ,  Kai Hou ,  Hongrun Wang ,  Liwei Liu ,  Yunsik Im ,  Wanpeng Teng ,  Xiaolong Li ,  Kai Guo ,  Zhiqiang Xu

IPC: G09G3/20 ,  G11C19/28

Abstract: The present disclosure provides a gate driving circuit, a method of driving a gate driving circuit, and a display panel. The gate driving circuit includes a plurality of driving units connected in cascade. Each driving unit includes: N shift register units; and a mode control circuit connected to the N shift register units, wherein the mode control circuit is configured to receive a control signal for the driving unit, and connect the N shift register units in one of a plurality of resolution modes under the control of the control signal.

公开(公告)号：US11778882B2

公开(公告)日：2023-10-03

申请号：US17199489

申请日：2021-03-12

Applicant: BOE Technology Group Co., Ltd.

Inventor： Zhiqiang Xu ,  Wei Qin ,  Weixing Liu ,  Kai Guo ,  Tieshi Wang

IPC: H01L27/32 ,  H01L51/56 ,  H10K59/35 ,  H01L27/12 ,  H10K59/12 ,  H10K71/00 ,  G09G3/20 ,  H10K59/65

CPC classification number: H10K59/353 ,  H01L27/124 ,  H10K59/12 ,  H10K59/351 ,  H10K71/00 ,  G09G3/2003 ,  G09G2300/0452 ,  H10K59/1201 ,  H10K59/65

Abstract: A display panel includes a base substrate and a plurality of sub-pixel groups. The plurality of sub-pixel groups includes a first sub-pixel group and a second sub-pixel group. The first sub-pixel group includes two adjacent sub-pixels with a first interval therebetween, and the second sub-pixel group includes two adjacent sub-pixels with a second interval therebetween. The first interval is different from the second interval.

公开(公告)号：US12008960B2

公开(公告)日：2024-06-11

申请号：US18014254

申请日：2021-11-22

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Weixing Liu ,  Kuanjun Peng ,  Bin Qin ,  Xue Dong ,  Fangzhen Zhang ,  Wanpeng Teng ,  Tieshi Wang ,  Wanzhi Chen ,  Kai Guo ,  Chunfang Zhang

IPC: G09G3/3233 ,  H01L27/15 ,  H01L33/06 ,  H01L33/38

CPC classification number: G09G3/3233 ,  H01L27/156 ,  H01L33/06 ,  H01L33/38 ,  G09G2300/0426 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2310/0262 ,  G09G2310/08 ,  G09G2320/0233

Abstract: A pixel driving circuit includes a data writing circuit, a light-emitting control circuit and a light-emitting diode chip. The data writing circuit is electrically connected to a first scanning signal terminal, a data signal terminal and a first node. The light-emitting control circuit is electrically connected to the first node, an enable signal terminal, a first voltage signal terminal and a second node, and is configured to transmit a first voltage signal received at the first voltage signal terminal to the second node. The light-emitting diode chip is electrically connected to the second node and a second voltage signal terminal. The light-emitting diode chip includes a plurality of light-emitting portions. The light-emitting diode chip is configured to drive the plurality of light-emitting portions to emit light in different periods of time respectively or drive at least two light-emitting portions to emit light in a same period of time.

公开(公告)号：US20240105091A1

公开(公告)日：2024-03-28

申请号：US18491531

申请日：2023-10-20

Applicant: BOE Technology Group Co., Ltd.

Inventor： Weixing Liu ,  Wei Qin ,  Kuanjun Peng ,  Tieshi Wang ,  Chunfang Zhang ,  Hui Zhang ,  Changfeng Li ,  Shunhang Zhang ,  Kai Hou ,  Hongrun Wang ,  Liwei Liu ,  Yunsik Im ,  Wanpeng Teng ,  Xiaolong Li ,  Kai Guo ,  Zhiqiang Xu

IPC: G09G3/20 ,  G11C19/28

CPC classification number: G09G3/20 ,  G11C19/287 ,  G09G2300/0408 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2310/08

Abstract: The present disclosure provides a gate driving circuit, a method of driving a gate driving circuit, and a display panel. The gate driving circuit includes a plurality of driving units connected in cascade. Each driving unit includes: N shift register units; and a mode control circuit connected to the N shift register units, wherein the mode control circuit is configured to receive a control signal for the driving unit, and connect the N shift register units in one of a plurality of resolution modes under the control of the control signal.

公开(公告)号：US11335261B2

公开(公告)日：2022-05-17

申请号：US17202560

申请日：2021-03-16

Applicant: BOE Technology Group Co., Ltd.

Inventor： Weixing Liu ,  Tieshi Wang ,  Wei Qin ,  Chunfang Zhang

IPC: G09G3/3233

Abstract: A display panel and a driving method thereof, and a display apparatus are provided. In the present disclosure, external compensation circuits electrically connected to pixel circuits are added. The external compensation circuits are configured to adjust anode voltages of light emitting devices to cause the anode voltages of the light emitting devices to be consistent with voltages of data voltage ends.

公开(公告)号：US20210327357A1

公开(公告)日：2021-10-21

申请号：US17271776

申请日：2020-07-22

Applicant: BOE Technology Group Co., Ltd.

Inventor： Weixing Liu ,  Tieshi Wang ,  Zhiqiang Xu ,  Shengnan Li ,  Wanpeng Teng ,  Chunfang Zhang ,  Xiaolong Li ,  Wei Qin ,  Kai Guo ,  Kuanjun Peng

IPC: G09G3/3258 ,  H01L27/32 ,  H01L51/50

Abstract: The present disclosure provides a pixel circuit and a method for driving the same, and a display panel. The pixel circuit includes a driving sub-circuit and a light-emitting control sub-circuit. The driving sub-circuit is configured to transmit a first power voltage at a first power signal terminal to a second node. The light-emitting control sub-circuit is configured to: transmit a voltage at the second node and a second power voltage at the second power signal terminal to the first electrode of the first light-emitting element and the second electrode of the first light-emitting element respectively in a first period, to the first electrode of the second light-emitting element and the second electrode of the second light-emitting element respectively in a second period, and to the first electrode of the third light-emitting element and the second electrode of the third light-emitting element respectively in a third period.

公开(公告)号：US11138923B2

公开(公告)日：2021-10-05

申请号：US16891124

申请日：2020-06-03

Applicant: BOE Technology Group Co., Ltd.

Inventor： Shengnan Li ,  Wei Qin ,  Tieshi Wang ,  Weixing Liu ,  Chunfang Zhang ,  Wanpeng Teng ,  Dongni Liu

IPC: G09G3/32

Abstract: A pixel circuit, a driving method thereof and a display apparatus are provided. The pixel circuit comprises a control module, a short-circuit protection module, a drive transistor and a light-emitting device, wherein the short-circuit protection module is used for providing a data voltage to a gate of the drive transistor in response to a gate signal; a second pole of the drive transistor is connected to a positive pole of the light-emitting device, and a negative pole of the light-emitting device receives a second power supply voltage; the short-circuit protection module is used for providing a third power supply voltage to the gate of the drive transistor to turn off the drive transistor in response to the data voltage provided to the gate of the drive transistor and the second power supply voltage provided to the positive pole of the light-emitting device.

公开(公告)号：US20210166607A1

公开(公告)日：2021-06-03

申请号：US16944973

申请日：2020-07-31

Applicant: BOE Technology Group Co., Ltd.

Inventor： Shengnan LI ,  Wei Qin ,  Tieshi Wang ,  Xiaolong Li ,  Weixing Liu ,  Kuanjun Peng

IPC: G09G3/20 ,  G09G3/3266

Abstract: Disclosed are a method for driving a silicon-based driving back plate and a display apparatus. The method includes: acquiring a watch position of a user on the silicon-based driving back plate within one frame time; determining a watch region of the user on the silicon-based driving back plate according to the watch position; and controlling a sum of an analog modulation bit for analog scanning charging and a digital modulation bit for digital scanning charging performed on each row of pixels in the watch region to be greater than a sum of an analog modulation bit for analog scanning charging and a digital modulation bit for digital scanning charging performed on each row of pixels in a non-watch region.

公开(公告)号：US12199105B2

公开(公告)日：2025-01-14

申请号：US18021902

申请日：2022-05-24

Applicant: BOE Technology Group Co., Ltd.

Inventor： Zhiqiang Xu ,  Weixing Liu ,  Chunfang Zhang ,  Wanpeng Teng ,  Jintao Peng ,  Kai Guo ,  Meirong Lu

IPC: G02F1/1343 ,  G02F1/133 ,  G02F1/13357 ,  G02F1/1362 ,  G02F1/1368 ,  H01L27/12

Abstract: The embodiment of the present disclosure provides a display panel, which includes an array substrate, a counter substrate and a spacer. The array substrate includes a base substrate and a plurality of signal lines on the base substrate. The plurality of signal lines include a plurality of first signal lines and a plurality of second signal lines. The plurality of first signal lines and the plurality of second signal lines intersect each other to define a plurality of first regions. The plurality of first regions include a plurality of first pixel regions, at least one second pixel region and at least one redundant region. The first signal line extends along a first direction, the second signal line includes a body portion extending along a second direction, at least one second signal line further includes a bending portion connected to the body portion.

公开(公告)号：US12136378B2

公开(公告)日：2024-11-05

申请号：US18022479

申请日：2022-03-14

Applicant: BOE Technology Group Co., Ltd.

Inventor： Weixing Liu ,  Jintao Peng ,  Jiao Li ,  Chunfang Zhang ,  Xinxing Wang

IPC: G09G3/20 ,  G09G3/3266 ,  G11C19/28

Abstract: Provided is a shift register unit. The shift register unit includes: a first input circuit, connected to a first control terminal, a turn-on signal terminal, a first node and a second node; a second input circuit, connected to a first power supply terminal, the first node and a third node; an output control circuit, connected to the first node, the second node, the third node, a second control terminal and a fourth node; and an output circuit, connected to the second node, the fourth node, the first power supply terminal, a second power supply terminal, a first output terminal and a second output terminal.