RE-ASSIGNING CACHE LINE WAYS
    51.
    发明申请
    RE-ASSIGNING CACHE LINE WAYS 有权
    重新分配高速缓存线路

    公开(公告)号:US20060259703A1

    公开(公告)日:2006-11-16

    申请号:US11383463

    申请日:2006-05-15

    IPC分类号: G06F12/00 G06F13/00

    CPC分类号: G06F12/0864 G06F11/3648

    摘要: An information carrier medium containing software that, when executed by a processor, causes the processor to receive information from circuit logic that is adapted to collect the information from caches on different cache levels. Each of the caches comprises a plurality of cache lines, and each cache line is associated with a way. The software also causes the processor to reassign the way of a cache line to a different way.

    摘要翻译: 一种包含软件的信息载体介质,所述软件在由处理器执行时使所述处理器从适于从不同缓存级别上的高速缓存收集信息的电路逻辑接收信息。 每个高速缓存包括多条高速缓存线,并且每条高速缓存行与一条路相关联。 该软件还使处理器以不同的方式重新分配高速缓存行的方式。

    PROVIDING INFORMATION ASSOCIATED WITH A CACHE
    52.
    发明申请
    PROVIDING INFORMATION ASSOCIATED WITH A CACHE 有权
    提供与缓存相关的信息

    公开(公告)号:US20060259700A1

    公开(公告)日:2006-11-16

    申请号:US11383459

    申请日:2006-05-15

    IPC分类号: G06F12/00 G06F13/00

    CPC分类号: G06F12/122 G06F12/0897

    摘要: An information carrier medium containing software that, when executed by a processor, causes the processor to receive information from circuit logic that is adapted to collect the information from caches on different cache levels, the information associated with a common address. The software also causes the processor to provide the information to a user of the software. The information comprises cache level and cache type information associated with a particular cache from one of the different cache levels.

    摘要翻译: 一种包含软件的信息载体介质,所述软件在由处理器执行时使所述处理器从适于从不同高速缓存级别的高速缓存收集信息的电路逻辑接收信息,所述信息与公共地址相关联。 软件还使得处理器向软件的用户提供信息。 信息包括来自不同高速缓存级别之一的与特定高速缓存相关联的缓存级别和高速缓存类型信息。

    DETERMINING THE PRESENCE OF A VIRTUAL ADDRESS IN A CACHE
    53.
    发明申请
    DETERMINING THE PRESENCE OF A VIRTUAL ADDRESS IN A CACHE 有权
    确定一个虚拟地址在高速缓存中的存在

    公开(公告)号:US20060259693A1

    公开(公告)日:2006-11-16

    申请号:US11383354

    申请日:2006-05-15

    IPC分类号: G06F12/00 G06F13/00

    CPC分类号: G06F11/3648 G06F12/0802

    摘要: An information carrier medium containing software that, when executed by a processor, causes the processor to receive status information from circuit logic that collects the status information from caches associated with different processor cores. The software also causes the processor to provide the information to a user of the software. The status information indicates whether one of the caches comprises an entry associated with a virtual address.

    摘要翻译: 一种包含软件的信息载体介质,所述软件在由处理器执行时使所述处理器从与不同处理器核心相关联的高速缓存收集状态信息的电路逻辑接收状态信息。 软件还使得处理器向软件的用户提供信息。 状态信息指示高速缓存之一是否包括与虚拟地址相关联的条目。

    WRITING TO A SPECIFIED CACHE
    54.
    发明申请
    WRITING TO A SPECIFIED CACHE 审中-公开
    写入指定的高速缓存

    公开(公告)号:US20060259692A1

    公开(公告)日:2006-11-16

    申请号:US11383349

    申请日:2006-05-15

    IPC分类号: G06F12/00 G06F13/00

    CPC分类号: G06F11/3648 G06F12/0802

    摘要: An information carrier medium containing software that, when executed by a processor, causes the processor to receive input from a user of the software, the input comprising data and a cache identifier. The processor also transfers the data and cache identifier to a circuit logic that is adapted to write to caches in a cache system coupled to the circuit logic. The processor also causes the circuit logic to write the data to a cache in the cache system that corresponds to the cache identifier.

    摘要翻译: 一种包含软件的信息载体介质,所述软件在被处理器执行时使所述处理器从所述软件的用户接收输入,所述输入包括数据和高速缓存标识符。 处理器还将数据和高速缓存标识符传送到适于写入耦合到电路逻辑的高速缓存系统中的高速缓存的电路逻辑。 处理器还使得电路逻辑将数据写入高速缓存系统中对应于高速缓存标识符的高速缓存。

    Lockable motor assembly for use in a well bore
    55.
    发明授权
    Lockable motor assembly for use in a well bore 有权
    用于井眼的可锁定电机组件

    公开(公告)号:US06945328B2

    公开(公告)日:2005-09-20

    申请号:US10694069

    申请日:2003-10-27

    IPC分类号: E21B4/02 E21B7/06 E21B29/06

    摘要: A lockable motor assembly for use in a well bore comprises a PDM motor having a rotor and a stator. A locking member has a splined projection which is received within a splined recess of the rotor and external splines which mate with splines provided on a sub connected to the stator. The components are held in this configuration by a shear ring until the fluid pressure within a chamber defined between the locking member and the sub is sufficient to cause the shear ring to shear. The locking member may then move out of the engagement with the rotor to free the motor for operation. The locking member is held in this position by a ratchet mechanism.

    摘要翻译: 用于井眼的可锁定电动机组件包括具有转子和定子的PDM电动机。 锁定构件具有花键突起,其接收在转子的花键凹槽内,并且外花键与设置在连接到定子上的副翼上的花键配合。 部件通过剪切环保持在该构造中,直到限定在锁定构件和副之间的室内的流体压力足以使剪切环产生剪切。 然后,锁定构件可以离开与转子的接合,以释放电动机以进行操作。 锁定构件通过棘轮机构保持在该位置。

    Method and apparatus for providing an improved user interface in speech
recognition systems
    57.
    发明授权
    Method and apparatus for providing an improved user interface in speech recognition systems 失效
    用于在语音识别系统中提供改进的用户界面的方法和装置

    公开(公告)号:US6098043A

    公开(公告)日:2000-08-01

    申请号:US107386

    申请日:1998-06-30

    IPC分类号: G10L15/22 G10L15/26 G10L15/00

    CPC分类号: G10L15/26 G10L15/222

    摘要: The invention relates to a method and an apparatus for improving the responsiveness and accuracy of speech recognition systems with tightly integrated Automatic Speech Recognition (ASR) and voice resources, more particularly to a system and method for providing an improved speech recognition enhanced user interface through a reduction in the effective talk-over period. The speech recognition system comprises a host server, managing and arbitrating between a voice resource and an ASR resource, among other resources, through the exchange of run-time controls. The novel method provides for a daisy chain architecture within the speech recognition system, whereby the voice data, or prompt, output by the voice resource is passed directly to the ASR resource, where it is output to the system user. Upon detection of speech from the user, the ASR resource stops transmitting the prompt to the system user, transparent to both the voice resource and the server, followed by a "speech detected" message sent to the server. The delay between the time at which the speech is detected and the time at which the voice resource stops playing the prompt, as a result of a "stop play" request received from the server, goes unnoticed by the system user due to the ASR resource intervention.

    摘要翻译: 本发明涉及一种用于通过紧密集成的自动语音识别(ASR)和语音资源来提高语音识别系统的响应性和准确性的方法和装置,更具体地涉及一种用于通过以下方式提供改进的语音识别增强的用户界面的系统和方法: 减少有效的谈话时期。 语音识别系统包括主机服务器,通过交换运行时间控制,在语音资源和ASR资源之间以及其他资源之间管理和仲裁。 该新颖的方法提供了语音识别系统内的菊花链架构,由此由语音资源输出的语音数据或提示被直接传递到ASR资源,在那里它被输出给系统用户。 当用户发现语音时,ASR资源停止向系统用户发送提示,对语音资源和服务器都是透明的,随后发送到服务器的“语音检测”消息。 检测到语音的时间与语音资源停止播放提示的时间之间的延迟作为从服务器接收到的“停止播放”请求的结果,由于ASR资源而被系统用户忽视 介入。

    Method and system for handling discarded and merged events when monitoring a system bus
    58.
    发明授权
    Method and system for handling discarded and merged events when monitoring a system bus 有权
    监视系统总线时处理丢弃和合并事件的方法和系统

    公开(公告)号:US08943248B2

    公开(公告)日:2015-01-27

    申请号:US13346209

    申请日:2012-01-09

    IPC分类号: G06F13/00 G06F11/36

    CPC分类号: G06F11/3656 G06F11/364

    摘要: A bus monitoring and debugging system operating independently without impacting the normal operation of the CPU and without adding any overhead to the application being monitored. The bus is monitored for discarded speculative read and for merged write transactions in order to determine the true bus throughputs. Bus statistics that are relevant to providing insight to system operation are automatically captured. Logging of relevant events may be enabled or disabled when a sliding time window expires, or alternatively by external trigger events.

    摘要翻译: 总线监控和调试系统独立运行,不会影响CPU的正常运行,并且不会对正在监视的应用程序造成任何开销。 对总线进行监控以进行丢弃的推测读取和合并写入事务,以确定真实的总线吞吐量。 与系统操作的洞察相关的总线统计信息将被自动捕获。 当滑动时间窗口到期时,或者通过外部触发事件,可以启用或禁用相关事件的记录。

    Navigating trace data
    59.
    发明授权
    Navigating trace data 有权
    浏览跟踪数据

    公开(公告)号:US07802149B2

    公开(公告)日:2010-09-21

    申请号:US11383474

    申请日:2006-05-15

    IPC分类号: G06F11/00

    CPC分类号: G06F11/3644 G06F11/3648

    摘要: Navigating trace data. A traced program, or the operating system responsible for the traced program, writes index values to a particular hardware location, which index values become part of the trace data by operation of hardware devices in the target system. A debug-trace program (executed either in an attached host computer or as an embedded debugger) uses the index values to assist the user of the debug-trace program in navigating to particular portions of the trace data based on the index values.

    摘要翻译: 浏览跟踪数据。 跟踪的程序或负责跟踪的程序的操作系统将索引值写入特定的硬件位置,通过目标系统中的硬件设备的操作,哪些索引值成为跟踪数据的一部分。 调试跟踪程序(在附加的主机计算机中或作为嵌入式调试器执行)使用索引值来帮助调试跟踪程序的用户根据索引值导航到跟踪数据的特定部分。

    Re-assigning cache line ways
    60.
    发明授权
    Re-assigning cache line ways 有权
    重新分配缓存线路方式

    公开(公告)号:US07673101B2

    公开(公告)日:2010-03-02

    申请号:US11383463

    申请日:2006-05-15

    CPC分类号: G06F12/0864 G06F11/3648

    摘要: An information carrier medium containing software that, when executed by a processor, causes the processor to receive information from circuit logic that is adapted to collect the information from caches on different cache levels. Each of the caches comprises a plurality of cache lines, and each cache line is associated with a way. The software also causes the processor to reassign the way of a cache line to a different way.

    摘要翻译: 一种包含软件的信息载体介质,所述软件在由处理器执行时使所述处理器从适于从不同高速缓存级别的高速缓存收集信息的电路逻辑接收信息。 每个高速缓存包括多条高速缓存线,并且每条高速缓存行与一条路相关联。 该软件还使处理器以不同的方式重新分配高速缓存行的方式。