公开(公告)号：US20220415779A1

公开(公告)日：2022-12-29

申请号：US17357896

申请日：2021-06-24

Applicant: Intel Corporation

Inventor： Georgios C. DOGIAMIS ,  Aleksandar ALEKSOV ,  Veronica STRONG ,  Neelam PRABHU GAUNKAR ,  Telesphor KAMGAING

IPC: H01L23/498 ,  H01L23/15 ,  H01L21/48

Abstract: Embodiments disclosed herein include package substrates with angled vias and/or via planes. In an embodiment, a package substrate comprises a core with a first surface and a second surface opposite from the first surface. In an embodiment, a first pad is on the first surface, and a second pad on the second surface, where the second pad is outside a footprint of the first pad. In an embodiment, the package substrate further comprises a via through a thickness of the core, where the via connects the first pad to the second pad.

公开(公告)号：US20220406725A1

公开(公告)日：2022-12-22

申请号：US17350175

申请日：2021-06-17

Applicant: Intel Corporation

Inventor： Telesphor KAMGAING ,  Veronica STRONG ,  Neelam PRABHU GAUNKAR ,  Georgios C. DOGIAMIS ,  Aleksandar ALEKSOV ,  Johanna M. SWAN

IPC: H01L23/552 ,  H01L23/15 ,  H01L23/498 ,  H01L21/48

Abstract: Embodiments described herein may be related to apparatuses, processes, and techniques related to glass interposers or substrates that may be created using a glass etching process to enable highly integrated modules. Planar structures, which may be vertical planar structures, created within the glass interposer may be used to provide shielding for conductive vias in the glass interposer, to increase the signal density within the glass substrate and to reduce cross talk. Other embodiments may be described and/or claimed.

公开(公告)号：US20220406686A1

公开(公告)日：2022-12-22

申请号：US17349695

申请日：2021-06-16

Applicant: Intel Corporation

Inventor： Aleksandar ALEKSOV ,  Telesphor KAMGAING ,  Neelam PRABHU GAUNKAR ,  Georgios C. DOGIAMIS ,  Veronica STRONG

IPC: H01L23/473 ,  H01L23/13 ,  H01L23/15 ,  H01L23/467 ,  H01L23/498 ,  H01L21/48

Abstract: Embodiments disclosed herein include package substrates and methods of forming such package substrates. In an embodiment a package substrate comprises a core with a first surface and a second surface opposite from the first surface. In an embodiment, a buildup layer is over the first surface of the core. In an embodiment, a channel is through the core, where the channel extends in a direction that is substantially parallel to the first surface.

公开(公告)号：US20220406616A1

公开(公告)日：2022-12-22

申请号：US17349667

申请日：2021-06-16

Applicant: Intel Corporation

Inventor： Veronica STRONG ,  Aleksandar ALEKSOV ,  Georgios C. DOGIAMIS ,  Telesphor KAMGAING ,  Neelam PRABHU GAUNKAR

IPC: H01L21/48 ,  H01L23/498

Abstract: Embodiments disclosed herein include package substrates and methods of fabricating such substrates. In an embodiment, a package substrate comprises a core with a first surface and a second surface opposite from the first surface. The package substrate further comprises a via hole through the core. In an embodiment the via hole comprises a first portion, a second portion, and a perforated ledge between the first portion and the second portion. In an embodiment, the package substrate further comprises a via filling the via hole.

公开(公告)号：US20220404568A1

公开(公告)日：2022-12-22

申请号：US17350809

申请日：2021-06-17

Applicant: Intel Corporation

Inventor： Aleksandar ALEKSOV ,  Telesphor KAMGAING ,  Veronica STRONG ,  Neelam PRABHU GAUNKAR ,  Georgios C. DOGIAMIS

IPC: G02B6/42

Abstract: Embodiments disclosed herein include electronic packages with a core that includes an optical waveguide and methods of forming such electronic packages. In an embodiment, a package substrate comprises a core, and a photonics die embedded in the core. In an embodiment, the electronic package further comprises an optical waveguide embedded in the core. In an embodiment, the optical waveguide optically couples the photonics die to an edge of the core.

公开(公告)号：US20200312782A1

公开(公告)日：2020-10-01

申请号：US16651949

申请日：2017-09-30

Applicant: Intel Corporation

Inventor： Feras EID ,  Henning BRAUNISCH ,  Shawna M. LIFF ,  Georgios C. DOGIAMIS ,  Johanna M. SWAN

IPC: H01L23/552 ,  H01L21/48 ,  H01L23/04 ,  H01L23/10 ,  H01L23/498 ,  H01L23/00

Abstract: A device package and a method of forming the device package are described. The device package includes a substrate having a ground plane and dies disposed on the substrate. The dies are electrically coupled to the substrate with solder balls or bumps surrounded by an underfill layer. The device package has a mold layer disposed over and around the dies, the underfill layer, and the substrate. The device package further includes an additively manufactured electromagnetic interference (EMI) shield layer disposed on an outer surface of the mold layer. The additively manufactured EMI shield layer is electrically coupled to the ground plane of the substrate. The outer surface of the mold layer may include a topmost surface and one or more sidewalls that are covered with the additively manufactured EMI shield layer. The additively manufactured EMI shield may include a first and second additively manufactured EMI shield layers and an additively manufactured EMI shield frame.

公开(公告)号：US20200066663A1

公开(公告)日：2020-02-27

申请号：US16465132

申请日：2016-12-30

Applicant: Intel Corporation

Inventor： Aleksandar ALEKSOV ,  Georgios C. DOGIAMIS ,  Telesphor KAMGAING ,  Sasha N. OSTER

IPC: H01L23/66 ,  H01L23/31 ,  H01L23/538 ,  H01L25/16 ,  H01L23/552 ,  H01Q1/22 ,  H01Q1/24 ,  H01Q1/52

Abstract: Embodiments of the invention include a microelectronic device that includes a first ultra thin substrate formed of organic dielectric material and conductive layers, a first mold material to integrate first radio frequency (RF) components with the first substrate, and a second ultra thin substrate being coupled to the first ultra thin substrate. The second ultra thin substrate formed of organic dielectric material and conductive layers. A second mold material integrates second radio frequency (RF) components with the second substrate.

公开(公告)号：US20190165250A1

公开(公告)日：2019-05-30

申请号：US16097600

申请日：2016-07-01

Applicant: Intel Corporation

Inventor： Thomas L. SOUNART ,  Feras EID ,  Sasha N. OSTER ,  Georgios C. DOGIAMIS ,  Adel A. ELSHERBINI ,  Shawna M. LIFF ,  Johanna M. SWAN

IPC: H01L41/09 ,  H01L41/113 ,  B81B3/00 ,  G01L9/00

Abstract: Embodiments of the invention include a pressure sensing device having a membrane that is positioned in proximity to a cavity of an organic substrate, a piezoelectric material positioned in proximity to the membrane, and an electrode in contact with the piezoelectric material. The membrane deflects in response to a change in ambient pressure and this deflection causes a voltage to be generated in the piezoelectric material with this voltage being proportional to the change in ambient pressure.

公开(公告)号：US20190008046A1

公开(公告)日：2019-01-03

申请号：US15639873

申请日：2017-06-30

Applicant: Intel Corporation

Inventor： Aleksandar ALEKSOV ,  Feras EID ,  Thomas L. SOUNART ,  Georgios C. DOGIAMIS ,  Johanna M. SWAN

IPC: H05K1/16 ,  H01L23/498 ,  H01L21/48 ,  H05K3/12 ,  H05K3/00 ,  H05K3/22 ,  H05K3/46

Abstract: Embodiments of the invention include a microelectronic device that includes a plurality of organic dielectric layers and a capacitor that is integrated with a first organic dielectric layer of the plurality of organic dielectric layers. The capacitor includes first and second conductive electrodes and an ultra-high-k dielectric layer that is positioned between the first and second conductive electrodes.

公开(公告)号：US20180350772A1

公开(公告)日：2018-12-06

申请号：US15777040

申请日：2015-12-22

Applicant: Intel Corporation

Inventor： Vijay K. NAIR ,  Georgios C. DOGIAMIS ,  Telesphor KAMGAING

IPC: H01L25/065 ,  H01L23/66 ,  H01L25/10 ,  H01L23/00

CPC classification number: H01L25/0655 ,  H01L23/66 ,  H01L24/16 ,  H01L25/065 ,  H01L25/105 ,  H01L2224/16225

Abstract: Embodiments of the invention include a microelectronic device that includes a transceiver coupled to a first substrate and a second substrate coupled to the first substrate. The second substrate includes an antenna unit for transmitting and receiving communications at a frequency of approximately 4 GHz or higher. An interposer substrate can provide a spacing between the first and second substrates.