SEMICONDUCTOR PACKAGE WITH ELECTROMAGNETIC INTERFERENCE SHIELDING USING METAL LAYERS AND VIAS

    公开(公告)号:US20190019764A1

    公开(公告)日:2019-01-17

    申请号:US16069377

    申请日:2016-03-31

    申请人: Intel Corporation

    摘要: A semiconductor package is described herein with electromagnetic shielding using metal layers and vias. In one example, the package includes a silicon substrate having a front side and a back side, the front side including active circuitry and an array of contacts to attach to a substrate, a metallization layer over the back side of the die to shield active circuitry from interference through the back side, and a plurality of through-silicon vias coupled to the back side metallization at one end and to front side lands of the array of lands at the other end to shield active circuitry from interference through the sides of the die.

    SINGLE LAYER LOW COST WAFER LEVEL PACKAGING FOR SFF SIP

    公开(公告)号:US20180301435A1

    公开(公告)日:2018-10-18

    申请号:US16015052

    申请日:2018-06-21

    申请人: Intel Corporation

    摘要: In one embodiment of the invention, a system in package (SiP) is described which includes a plurality of device components with different form factors embedded within a molding compound layer. A surface for each of the device components is coplanar with a surface of the molding compound layer, and a single redistribution layer (RDL) formed on the coplanar surfaces of the molding compound layer and the plurality of device components. An active device die is electrically bonded to the single RDL directly vertically adjacent the plurality of device components. In an embodiment, the SiP is electrically connected to a circuit board with the active device die between the single RDL and the circuit board. In an embodiment, the SiP is electrically connected to a circuit board with the active device die over the single RDL and the circuit board.