公开(公告)号：US20140136894A1

公开(公告)日：2014-05-15

申请号：US13673221

申请日：2012-11-09

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Bruce M. Fleischer ,  Thomas W. Fox ,  Hans M. Jacobson ,  Ravi Nair ,  Daniel A. Prener

IPC: G06F11/14

CPC classification number: G06F11/14 ,  G06F9/30036 ,  G06F9/30065 ,  G06F9/30116 ,  G06F9/3013 ,  G06F9/3863 ,  G06F9/3877 ,  G06F9/3887 ,  G06F11/1405 ,  G06F12/10 ,  Y02D10/13

Abstract: An aspect includes providing rollback support in an exposed-pipeline processing element. A method for providing rollback support in an exposed-pipeline processing element includes detecting, by rollback support logic, an error associated with execution of an instruction in the exposed-pipeline processing element. The rollback support logic determines whether the exposed-pipeline processing element supports replay of the instruction for a predetermined number of cycles. Based on determining that the exposed-pipeline processing element supports replay of the instruction, a rollback action is performed in the exposed-pipeline processing element to attempt recovery from the error.

Abstract translation: 一个方面包括在暴露流水线处理元件中提供回滚支持。 用于在暴露流水线处理元件中提供回滚支持的方法包括通过回滚支持逻辑来检测与暴露流水线处理元件中的指令的执行相关联的错误。 回滚支持逻辑确定暴露流水线处理元件是否支持指令预定次数循环的重放。 基于确定暴露流水线处理元件支持指令的重放，在暴露流水线处理元件中执行回滚动作以尝试从错误中恢复。

公开(公告)号：US20140136811A1

公开(公告)日：2014-05-15

申请号：US13674520

申请日：2012-11-12

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Bruce M. Fleischer ,  Thomas W. Fox ,  Hans M. Jacobson ,  James A. Kahle ,  Jaime H. Moreno ,  Ravi Nair

IPC: G06F12/10

CPC classification number: G06F13/28 ,  Y02D10/14

Abstract: Embodiments relate to loading and storing of data. An aspect includes a method for transferring data in an active memory device that includes memory and a processing element. An instruction is fetched and decoded for execution by the processing element. Based on determining that the instruction is a gather instruction, the processing element determines a plurality of source addresses in the memory from which to gather data elements and a destination address in the memory. One or more gathered data elements are transferred from the source addresses to contiguous locations in the memory starting at the destination address. Based on determining that the instruction is a scatter instruction, a source address in the memory from which to read data elements at contiguous locations and one or more destination addresses in the memory to store the data elements at non-contiguous locations are determined, and the data elements are transferred.

Abstract translation: 实施例涉及加载和存储数据。 一个方面包括用于在包括存储器和处理元件的活动存储器件中传送数据的方法。 指令被取出并解码以供处理元件执行。 基于确定指令是收集指令，处理元件确定存储器中的多个源地址，以从存储器中收集数据元素和目的地地址。 一个或多个收集的数据元素从目的地址从源地址传送到存储器中的连续位置。 基于确定该指令是散布指令，确定存储器中从邻接位置读取数据元素的源地址和存储器中的一个或多个目标地址以将数据元素存储在非连续位置的源地址，并且 数据元素被传送。

公开(公告)号：US20140130050A1

公开(公告)日：2014-05-08

申请号：US13669877

申请日：2012-11-06

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Bruce M. Fleischer ,  Thomas W. Fox ,  Hans M. Jacobson ,  Ravi Nair

IPC: G06F9/46

CPC classification number: G06F9/46 ,  G06F9/3877 ,  G06F9/5044 ,  G06F2209/509 ,  Y02D10/22

Abstract: According to one embodiment of the present invention, a method for operating a computer system including a main processor, a processing element and memory is provided. The method includes receiving, at the processing element, a task from the main processor, performing, by the processing element, an instruction specified by the task, determining, by the processing element, that a function is to be executed on the main processor, the function being part of the task, sending, by the processing element, a request to the main processor for execution, the request comprising execution of the function and receiving, at the processing element, an indication that the main processor has completed execution of the function specified by the request.

Abstract translation: 根据本发明的一个实施例，提供了一种用于操作包括主处理器，处理元件和存储器的计算机系统的方法。 该方法包括在处理单元处接收来自主处理器的任务，由处理单元执行由任务指定的指令，由处理单元确定要在主处理器上执行功能， 所述功能是所述任务的一部分，由所述处理元件发送对所述主处理器执行的请求，所述请求包括所述功能的执行，并且在所述处理元件处接收到所述主处理器已完成所述主处理器的执行的指示 函数由请求指定。

公开(公告)号：US20140115294A1

公开(公告)日：2014-04-24

申请号：US13655505

申请日：2012-10-19

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Bruce M. Fleischer ,  Hans M. Jacobson ,  Ravi Nair

IPC: G06F12/02

CPC classification number: G06F12/0215 ,  G06F1/3275 ,  G06F12/08 ,  Y02D10/13 ,  Y02D10/14

Abstract: According to one embodiment, a method for operating a memory device includes receiving a first request from a requestor, wherein the first request includes accessing data at a first memory location in a memory bank, opening a first page in the memory bank, wherein opening the first page includes loading a row including the first memory location into a buffer, the row being loaded from a row location in the memory bank and transmitting the data from the first memory location to the requestor. The method also includes determining, by a memory controller, whether to close the first page following execution of the first request based on information relating to a likelihood that a subsequent request will access the first page.

Abstract translation: 根据一个实施例，一种用于操作存储设备的方法包括从请求者接收第一请求，其中第一请求包括在存储体中的第一存储器位置访问数据，打开存储体中的第一页，其中打开 第一页包括将包括第一存储器位置的行加载到缓冲器中，该行从存储体中的行位置加载并将数据从第一存储器位置传送到请求器。 该方法还包括由存储器控制器基于与随后的请求将访问第一页的可能性有关的信息确定第一请求执行之后是否关闭第一页。