公开(公告)号：US6075471A

公开(公告)日：2000-06-13

申请号：US41134

申请日：1998-03-12

申请人： Tomohiro Kimura ,  Fumitaka Ono ,  Ikuro Ueno ,  Taichi Yanagiya ,  Masayuki Yoshida

发明人： Tomohiro Kimura ,  Fumitaka Ono ,  Ikuro Ueno ,  Taichi Yanagiya ,  Masayuki Yoshida

IPC分类号： H04N19/00 ,  H03M7/30 ,  H03M7/40 ,  H04N1/413 ,  H04N19/423 ,  H04N19/91 ,  H03M7/00

CPC分类号： H03M7/4006

摘要： An adaptive coding method is comprised of: a fourth step (508), (510) for calculating an occurrence frequency of either the more probable symbol (MPS) or the less probable symbol (LPS) with respective to the entered input; a fifth step (511) for comparing an occurrence time accumulated value calculated as the occurrence frequency at the fourth step with a preselected value (threshold value), and for reducing the occurrence time accumulated value by 1/2 in the case that the occurrence time accumulated value reaches the preselected value (threshold value); and a sixth step (513) for defining the more probable symbol (MPS) and the less probable symbol (LPS) in correspondence with a predetermined region on a numerical line with respect to the data signal to thereby output coordinate values on the numerical line as a corded word.

摘要翻译： 自适应编码方法包括：第四步骤（508），（510），用于相应于输入的输入计算更可能符号（MPS）或较小可能符号（LPS）的出现频率; 第五步骤（511），用于将作为第四步骤的出现频率计算的出现时间累积值与预选值（阈值）进行比较，并且将发生时间累加值减少+ E，将1/2 + EE 发生时间累积值达到预选值（阈值）的情况; 以及第六步骤（513），用于与数据信号上的数字行上的预定区域相对应地定义更可能的符号（MPS）和较少的可能符号（LPS），从而在数字线上输出坐标值作为 一个有用的词

公开(公告)号：US5608241A

公开(公告)日：1997-03-04

申请号：US364472

申请日：1994-12-27

申请人： Sachiko Shibuya ,  Masayuki Yoshida ,  Nobuyoshi Chida ,  Osamu Matsumoto

发明人： Sachiko Shibuya ,  Masayuki Yoshida ,  Nobuyoshi Chida ,  Osamu Matsumoto

IPC分类号： H01L21/8247 ,  H01L27/105 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792 ,  H01L27/10

CPC分类号： H01L27/105 ,  H01L27/115

摘要： In the memory cell matrix of a semiconductor integrated circuit device having a non-volatile semiconductor memory cell portion and a logic portion, a second-layered Al wires are formed on the first-layered Al wires, with an interlayer insulating film interposed therebetween. The pattern of the second-layered Al wires is the same as that of the first-layered Al wires. This structure reduces the labor for designing mask data, and increases the coating ratio of a resist to an Al layer while minimizing a reduction in the transmittance of ultraviolet ray. As a result, the amount of a reaction compound supplied from the resist into the Al layer for forming the second-layered Al wires increases, which prevents the second-layered Al wires from being undercut. Thus, the second and subsequent-layered Al wires of the logic portion can be effectively prevented from being thinned.

摘要翻译： 在具有非挥发性半导体存储单元部分和逻辑部分的半导体集成电路器件的存储单元矩阵中，在第一层Al布线上形成有二层Al布线，其间夹有层间绝缘膜。 第二层Al线的图案与第一层Al线的图案相同。 这种结构减少了设计掩模数据的劳动，并且增加了抗蚀剂与Al层的涂布比，同时使紫外线的透射率降低到最小。 结果，从抗蚀剂供给到用于形成第二层Al线的Al层中的反应化合物的量增加，这防止了第二层Al线被底切。 因此，可以有效地防止逻辑部分的第二层和后续的Al布线变薄。

公开(公告)号：US5592163A

公开(公告)日：1997-01-07

申请号：US284086

申请日：1994-08-01

申请人： Tomohiro Kimura ,  Shigenori Kino ,  Masayuki Yoshida ,  Fumitaka Ono

发明人： Tomohiro Kimura ,  Shigenori Kino ,  Masayuki Yoshida ,  Fumitaka Ono

IPC分类号： H04N19/50 ,  H03M7/40 ,  H04L1/00 ,  H04L25/49 ,  H04N1/32 ,  H04N1/333 ,  H04N1/41 ,  H04N1/417 ,  H04N19/102 ,  H04N19/196 ,  H04N19/423 ,  H04N19/46 ,  H04N19/70 ,  H04N19/91 ,  H03M7/00

CPC分类号： H04N1/417 ,  H03M7/40 ,  H04N1/32128 ,  H04N1/33307 ,  H04N1/33315 ,  H04N2201/3212

摘要： This invention relates to a coding system and the coding method in encoding information source symbols of an image. When the total number of original information source symbols cannot be known at the decoding site just from the encoded symbols, it is an object to finish the decoding process correctly and decode the symbols equal to the number of original information source symbols.At an encoding site, the total number of information source unit composed of a finite number of information source symbols is placed at the tail of code at the completion of encoding process. For example, at the encoding site, the number of horizontal pels of an image are transmitted in advance as an information source unit and the total number of lines are placed at the tail of code at the completion of encoding process. At the decoding site, the number of decoded lines is counted and decoded up to the number of lines placed at the tail of code. As a result, it is possible to judge the end of information source symbols without missing the total number.

摘要翻译： 本发明涉及对图像信息源码元进行编码的编码系统和编码方法。 当原始信息源符号的总数仅在编码符号的解码位置不能被知道时，其目的是正确地完成解码处理，并解码等于原始信息源符号数的符号。 在编码站点，在编码处理完成时，将由有限数量的信息源符号组成的信息源单元的总数放在代码的尾部。 例如，在编码部位，预先将图像的水平像素数作为信息源单位发送，并且在编码处理完成时将总行数置于代码的尾部。 在解码位置，解码行的数量被计数并解码直到放置在码尾的行数。 结果，可以判断信息源符号的结束而不丢失总数。

公开(公告)号：US5499332A

公开(公告)日：1996-03-12

申请号：US312934

申请日：1994-09-30

申请人： Masayuki Yoshida

发明人： Masayuki Yoshida

IPC分类号： G09G5/24 ,  G06F17/21 ,  G06T3/00 ,  G06T11/40

CPC分类号： G06T11/40

摘要： There are provided a character processing method and apparatus having a function to convert data such as a character or the like which has been encoded by a vector form, into data of a dot form. The apparatus has a converter to convert data of a vector form into data of a dot form, and a discriminating circuit to discriminate whether painting of an outline is omitted or not, on the basis of the size of output data after conversion into dot-form data. As the result of the discrimination, if the painting process should not be omitted, the painting process is executed. If the painting process can be omitted, the painting process is omitted. Even a large character can be processed at a high speed without deterioration in the quality, and a small character can be processed at a high speed at a high quality.

摘要翻译： 提供了一种具有将已经被矢量形式编码的诸如字符等的数据转换为点形式的数据的功能的字符处理方法和装置。 该装置具有转换器，用于将矢量形式的数据转换为点形式的数据，以及鉴别电路，用于基于转换成点形式之后的输出数据的大小来区分轮廓的绘制是否被省略 数据。 作为鉴别的结果，如果不应该省略绘画过程，则执行绘画过程。 如果可以省略绘画处理，则省略绘画处理。 甚至可以高速处理大字符而不会降低质量，并且可以以高质量高质量地处理小字符。

公开(公告)号：US5498759A

公开(公告)日：1996-03-12

申请号：US170246

申请日：1993-12-27

申请人： Kazuya Nakada ,  Masayuki Yoshida

发明人： Kazuya Nakada ,  Masayuki Yoshida

IPC分类号： C23C22/44 ,  B32B7/12

CPC分类号： C23C22/44

摘要： The cleaned surface of an aluminum or aluminum alloy product, for example, aluminum coil, is treated with a 0.5 to 3 second spray of a chromating bath heated to 40.degree. to 60.degree. C., said bath having a pH of 1.0 to 3.0 and containing 0.1 to 3.0 g/L of tungstate ions and/or molybdate ions, 0.5 to 4.0 g/L of hexavalent chromium ions, 5.0 to 30.0 g/L of phosphate ions, and 0.05 to 2.0 g/L of free fluoride ions. A highly corrosion-resistant, highly paint-adherent chromate coating can thereby be formed on the surface of aluminum in less time than that required by prior phosphoric acid-based chromating treatments.

摘要翻译： PCT No.PCT / US92 / 04698 Sec。 371日期1993年12月27日第 102（e）日期1993年12月27日PCT提交1992年6月11日PCT公布。 公开号WO93 / 00457 日期：1993年1月7日铝或铝合金产品例如铝卷的清洁表面用加热至40℃至60℃的铬酸浴的0.5-3秒喷雾处理，所述浴具有 pH为1.0〜3.0，含有0.1〜3.0g / L的钨酸盐离子和/或钼酸根离子，0.5〜4.0g / L的六价铬离子，5.0〜30.0g / L的磷酸盐离子和0.05〜2.0g / L的游离氟离子。 因此，可以在比现有的磷酸基铬酸盐处理所需的时间更少的时间内在铝的表面上形成高度耐腐蚀，高涂料粘附的铬酸盐涂层。

公开(公告)号：US5356491A

公开(公告)日：1994-10-18

申请号：US64085

申请日：1993-05-21

申请人： Tomoyuki Aoki ,  Masayuki Yoshida

发明人： Tomoyuki Aoki ,  Masayuki Yoshida

IPC分类号： C08F12/26 ,  C08F12/00 ,  C09D5/08 ,  C09D5/12 ,  C09D125/00 ,  C09D125/18 ,  C23C22/23 ,  C23C22/68 ,  C23C22/07

CPC分类号： C23C22/68 ,  C09D125/18 ,  C09D5/08 ,  C23C22/23

摘要： A superior protective prepainting treatment for tin plated steel surfaces, particularly DI cans, may be achieved by contacting the surface with an aqueous liquid composition containing from 1 to 30 g/L of phosphate ions, from 0.1 to 5 g/L of condensed phosphate ions, from 0.5 to 5 g/L of reducing agent, and from 0.1 to 20 g/L of dissolved solids of a water soluble aminated poly{vinyl phenol} resin.

摘要翻译： PCT No.PCT / US91 / 08405 Sec。 371日期：1993年5月21日 102（e）日期1993年5月21日PCT 1991年11月14日PCT。对镀锡钢表面，特别是DI罐的优异的保护性涂料处理可以通过使表面与含有1至30g / L磷酸根离子，0.1〜5g / L缩合磷酸根离子，0.5〜5g / L还原剂，0.1〜20g / L溶解固体的水溶性胺化聚{乙烯基苯酚} 树脂。

公开(公告)号：US5307062A

公开(公告)日：1994-04-26

申请号：US990377

申请日：1992-12-15

申请人： Fumitaka Ono ,  Tomohiro Kimura ,  Masayuki Yoshida ,  Shigenori Kino

发明人： Fumitaka Ono ,  Tomohiro Kimura ,  Masayuki Yoshida ,  Shigenori Kino

IPC分类号： H03M7/40 ,  H03M7/00

CPC分类号： H03M7/4006

摘要： A coding system comprises the comparing circuit which compares a magnitude of the range on the number line which is allocated to the most probability symbol with a magnitude of the fixed range on the number line which is allocated to the Less Probability Symbol. If the range allocated to the MPS is smaller than that to the LPS, and when the symbol is the MPS, the range allocated to the LPS is generated. If the range allocated to the MPS is smaller than that to the LPS, and when the symbol is the LPS, the range allocated to the MPS is generated. By the system, a coding efficiency is improved especially when a probability of occurrence of LPS (Less Probability Symbol) is approximate to 1/2.

摘要翻译： 编码系统包括比较电路，其将分配给最大概率符号的号线上的范围的大小与分配给较小概率符号的号线上的固定范围的大小进行比较。 如果分配给MPS的范围小于LPS的范围，并且当符号是MPS时，则生成分配给LPS的范围。 如果分配给MPS的范围小于LPS的范围，并且当符号是LPS时，生成分配给MPS的范围。 通过该系统，当LPS的发生概率（Less概率符号）近似为1/2时，编码效率得到改善。

公开(公告)号：US5219775A

公开(公告)日：1993-06-15

申请号：US836592

申请日：1992-02-18

申请人： Yukihiro Saeki ,  Osamu Matsumoto ,  Masayuki Yoshida ,  Takahide Mizutani ,  Nobuyoshi Chida ,  Tomohisa Shigematsu ,  Teruo Uemura ,  Kenji Toyoda ,  Hiroyuki Takamura

发明人： Yukihiro Saeki ,  Osamu Matsumoto ,  Masayuki Yoshida ,  Takahide Mizutani ,  Nobuyoshi Chida ,  Tomohisa Shigematsu ,  Teruo Uemura ,  Kenji Toyoda ,  Hiroyuki Takamura

IPC分类号： H01L21/8247 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792

CPC分类号： H01L27/11521 ,  Y10S148/106

摘要： A manufacturing method of a semiconductor memory device includes the steps of selectively forming a field oxide film and a gate oxide film on a semiconductor substrate, depositing a first conductive layer on an entire surface of the resultant structure, selectively etching the first conductive layer located in a region other than an element region, depositing a second conductive layer on an entire surface of the resultant structure, and etching the first conductive layer and the second conductive layer using the same mask to form a plurality of floating gates by the first conductive layer and to form a plurality of control gates by the second conductive layer, wherein the step of selectively etching the first conductive layer includes the first etching step of forming cell slits for separating the plurality of floating gates from each other and the second etching step of forming removed regions each of which includes only one end of each of the plurality of control gates.

公开(公告)号：US5094967A

公开(公告)日：1992-03-10

申请号：US620701

申请日：1990-12-03

申请人： Kazuyoshi Shinada ,  Masayuki Yoshida ,  Takahide Mizutani ,  Naoki Hanada

发明人： Kazuyoshi Shinada ,  Masayuki Yoshida ,  Takahide Mizutani ,  Naoki Hanada

IPC分类号： H01L21/82 ,  H01L21/8234 ,  H01L21/8247 ,  H01L27/088 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792

CPC分类号： H01L27/11526 ,  H01L21/82 ,  H01L27/115 ,  H01L27/11539 ,  Y10S148/138

摘要： A method for manufacturing a semiconductor substrate device having a non-volatile memory cell region and a logic region including MOS transistors. A first insulating film and a first electrode layer are formed on a semiconductor substrate. Only those portions of the first insulating film and first electrode layer which are located in the logic region are removed, without removing those portions of the first insulating film and first electrode layer which are located in the non-volatile memory cell region. A sacrificial film is deposited for insulation over the entire surface of the memory cell region and logic region, and then a resist film is coated on the sacrificial film. Subsequently, impurity ions are implanted into a desired channel region located in the logic region. The resist film and sacrificial film are removed, and thereafter a second insulating film and a second electrode layer are formed.

公开(公告)号：US5067119A

公开(公告)日：1991-11-19

申请号：US688798

申请日：1991-04-22

申请人： Masayuki Yoshida ,  Junichi Yoshio ,  Osamu Watanabe

发明人： Masayuki Yoshida ,  Junichi Yoshio ,  Osamu Watanabe

IPC分类号： G11B23/36 ,  G11B20/00 ,  G11B27/00 ,  G11B27/10 ,  G11B27/11 ,  H03G3/00 ,  H03G5/16

CPC分类号： H03G5/16 ,  G11B27/002 ,  G11B27/105 ,  G11B27/107 ,  H03G3/005 ,  G11B2220/20 ,  G11B2220/2545 ,  G11B2220/65 ,  G11B2220/90 ,  G11B27/11

摘要： A recording media playing apparatus including tonal response control circuit configured to control the tone of reproduced sounds, by controlling signal levels of frequency components in a plurality of frequency bands, which are set to divide the frequency range of audio signals read out from the recording media, to designated variation ratios. The apparatus further comprises a memory device, a memory control device for storing, in response to a reproducing-tone memorizing command, data representing the variation ratios in the memory device correspondingly to identification information of each of the recording media, the data representing the variation ratios being stored as tone data, and a tonal response setting device for reading out the tone data using the identification information, the tone data corresponding to a recording medium to be played, and subsequently supplying the variation ratios represented by the tone data to the tonal response control circuit, thereby setting the tone of the reproduced sound. With this arrangement, the tonal response of the apparatus can be set automatically according to the type of music selections to be played.