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公开(公告)号：US20220300413A1
公开(公告)日：2022-09-22
申请号：US17831295
申请日：2022-06-02
Applicant: Pure Storage, Inc.
Inventor： Hari Kannan , Ying Gao , Boris Feigin
Abstract: A storage system has NVRAM (non-volatile random-access memory), solid-state storage memory, and a processor to perform a method. The method includes allocating virtual units of NVRAM with mapping of the virtual units to physical memory. The method includes writing data having various sizes into allocated first virtual units of memory and into allocated second virtual units of memory. The first virtual units of memory each include a first contiguous physical addressed amount of NVRAM having a first size. The second virtual units of memory each include an amount of NVRAM having a second size. The method includes relocating at least some of the data such that a portion of the allocated second virtual units of memory become available for the allocating.
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公开(公告)号：US11449232B1
公开(公告)日：2022-09-20
申请号：US15336618
申请日：2016-10-27
Applicant: Pure Storage, Inc.
Inventor： Hari Kannan , Nenad Miladinovic , Randy Zhao
Abstract: A scheduling system for a memory controller is provided. The system includes a scheduler configurable to receive a plurality of operation requests from a plurality of masters. The scheduler is configurable to form a sequence of one or more phases from each of the operation requests. The scheduler is configurable to arbitrate the plurality of operation requests and the one or more phases through one or more configurable policies. The system includes a sequencer configurable to receive the one or more phases and communicate with at least two flash memory devices having differing types of flash memory device interfaces through a plurality of channels.
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公开(公告)号：US20220215875A1
公开(公告)日：2022-07-07
申请号：US17704747
申请日：2022-03-25
Applicant: Pure Storage, Inc.
Inventor： Hari Kannan , Peter E. Kirkpatrick
Abstract: A method for page writes for triple or higher level cell flash memory is provided. The method includes receiving data in a storage system, from a client that is agnostic of page write requirements for triple or higher level cell flash memory, wherein the page write requirements specify an amount of data and a sequence of writing data for a set of pages to assure read data coherency for the set of pages. The method includes accumulating the received data, in random-access memory (RAM) in the storage system to satisfy the page write requirements for the triple or higher level cell flash memory in the storage system. The method includes writing at least a portion of the accumulated data in accordance with the page write requirements, from the RAM to the triple level cell, or the higher level cell, flash memory in the storage system as an atomic write.
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公开(公告)号：US20220197505A1
公开(公告)日：2022-06-23
申请号：US17124851
申请日：2020-12-17
Applicant: PURE STORAGE, INC.
Inventor： Hari Kannan , Gordon James Coleman , Yijie Zhao , Peter E. Kirkpatrick , Robert Lee , Yuhong Mao , Boris Feigin
Abstract: One or more performance parameters associated with data stored at a storage device of a plurality of storage devices are received by a storage controller. A first number of blocks of the storage device to a high resiliency portion and a second number of blocks of the storage device to a low resiliency portion of the storage device are allocated based on the one or more performance parameters.
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公开(公告)号：US11334254B2
公开(公告)日：2022-05-17
申请号：US16370032
申请日：2019-03-29
Applicant: Pure Storage, Inc.
Inventor： Hari Kannan
IPC: G06F3/06
Abstract: A storage system includes solid-state storage devices and a storage controller operatively coupled to the solid-state storage devices, the storage controller including a processing device, to receive data to be programmed to a solid-state storage device of the plurality of solid-state storage devices. The processing device is further to determine a mode for programming a flash page storing the data at the solid-state storage device based on a required reliability for the data and an anticipated number of program/erase cycles associated with the data and transmit the data and the mode for programming the flash page storing the data to the solid-state storage device, wherein the mode causes the solid-state storage device to program the data to a first portion of the flash page and program parity data to a remaining portion of the flash page.
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Patent Agency Ranking
公开(公告)号：US11231956B2
公开(公告)日：2022-01-25
申请号：US16200310
申请日：2018-11-26
Applicant: PURE STORAGE, INC.
Inventor： John Hayes , Brian Gold , Shantanu Gupta , Robert Lee , Hari Kannan
IPC: G06F16/00 , G06F9/46 , G06F16/10 , G06F13/16 , G06F3/06 , G06F12/0868 , G06F12/0802
Abstract: A method for a transactional commit in a storage unit is provided. The method includes receiving a logical record from a storage node into a transaction engine of a storage unit of the storage node and writing the logical record into a data structure of the transaction engine. The method includes writing, to a command queue of the transaction engine, an indication to perform an atomic update using the logical record and transferring each portion of the logical record from the data structure of the transaction engine to non-persistent memory of the storage unit as a committed transaction. A storage unit for a storage system is also provided.
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公开(公告)号：US11099749B2
公开(公告)日：2021-08-24
申请号：US16167383
申请日：2018-10-22
Applicant: Pure Storage, Inc.
Inventor： John Martin Hayes , Hari Kannan , Nenad Miladinovic
Abstract: A method for erasure detection in a storage cluster is provided. The method includes establishing a connection, via a network, of a storage unit to one of a plurality of storage nodes of a storage cluster and determining, for at least one page of a storage memory of the storage unit, that the at least one page is erased. The storage unit is one of a plurality of storage units configured to store user data in memory of the storage units in accordance with direction from the plurality of storage nodes. The method includes communicating from the storage unit to the one of the plurality of storage nodes that the at least one page is erased.
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公开(公告)号：US20210232331A1
公开(公告)日：2021-07-29
申请号：US17138885
申请日：2020-12-30
Applicant: PURE STORAGE, INC.
Inventor： Hari Kannan , Yuhong Mao , Mark Heuchert
Abstract: A storage system, blades, removable modules, and method of configuring a storage system are described. The storage system has blades with computing resources and storage resources. At least one of the blades has, or has added, one or more removable modules.
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公开(公告)号：US20210191638A1
公开(公告)日：2021-06-24
申请号：US17135747
申请日：2020-12-28
Applicant: PURE STORAGE, INC.
Inventor： Nenad Miladinovic , Hari Kannan , Ronald Karr
IPC: G06F3/06
Abstract: A method for read voltage levels in flash memory is provided. The method includes determining to which set of pages or blocks of a flash memory device a word line connects, according to a flash memory device architecture. The method includes determining one or more optimum read voltage levels, for one or more pages of the flash memory device that are accessed by activating the word line, according to a specified number of bits per cell and the flash memory device architecture, and using the one or more optimum read voltage levels to access further pages in the set of pages or blocks of the flash memory device to which the word line connect.
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公开(公告)号：US10853266B2
公开(公告)日：2020-12-01
申请号：US14871757
申请日：2015-09-30
Applicant: Pure Storage, Inc.
Inventor： Brian T. Gold , John Hayes , Hari Kannan
Abstract: A method for hardware assisted data lookup in a storage unit is provided. The method includes formatting data in at least one of a plurality of data formats for storage in the storage unit. The method includes configuring a logic unit with one or more parameters associated with the plurality of data formats and identifying incoming data with the one or more parameters as an instruction for execution.
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