公开(公告)号：US20070101012A1

公开(公告)日：2007-05-03

申请号：US11163790

申请日：2005-10-31

申请人： Qiang Li ,  Naxin Wang ,  Li-Cheng Tai

发明人： Qiang Li ,  Naxin Wang ,  Li-Cheng Tai

IPC分类号： G06F15/16

CPC分类号： H04L29/06027 ,  H04L65/4092 ,  H04L65/605 ,  H04L65/608

摘要： A system for live TV transmission over IP networks incorporates a content encoder receiving live TV broadcast and converting to RTP packets for multicast streaming. A streaming server receives the multicast RTP packets from the content encoder and converts the multicast stream to a unicast stream. The streaming server is also responsive to RTSP commands for trick mode operation. A settop box is connected through an IP network for receiving multicast RTP packets from the content encoder and generating RTSP commands for trick mode operation, the setup box issuing a leave multicast group signal upon issuing a trick mode command and receiving unicast transmission of RTP packets from the streaming server controllable by the trick mode commands.

摘要翻译： 用于通过IP网络实时电视传输的系统包括内容编码器，其接收直播电视广播并转换为用于组播流的RTP分组。 流服务器从内容编码器接收多播RTP分组，并将多播流转换为单播流。 流服务器还响应于RTSP命令进行特技模式操作。 机顶盒通过IP网络连接，用于从内容编码器接收多播RTP分组，并产生用于特技模式操作的RTSP命令，该设置框在发出特技模式命令时发出离开组播组信号，并接收来自 流服务器可以通过特技模式命令控制。

公开(公告)号：US20060119446A1

公开(公告)日：2006-06-08

申请号：US11041549

申请日：2005-01-24

申请人： Qiang Li

发明人： Qiang Li

IPC分类号： H03B1/00

CPC分类号： H03K3/35613

摘要： A divider for a local oscillator (LO) generator system of a phase locked loop (PLL) in a transceiver chip. The divider includes at least one divider unit. Each divider unit includes a frequency divider unit for receiving an input signal having an input frequency and for outputting an output signal having an output frequency which is approximately one half of the input frequency. Each divider unit also includes a resistor bank coupled between a voltage source and the frequency divider unit, and a current stirring unit for supplying current to the frequency divider unit. The resistance of the resistor bank and a magnitude of the current supplied by the current stirring unit are variable depending on the input frequency.

摘要翻译： 用于收发器芯片中锁相环（PLL）的本地振荡器（LO）发生器系统的分频器。 除法器包括至少一个除法器单元。 每个除法器单元包括分频器单元，用于接收具有输入频率的输入信号，并输出具有输入频率约为输入频率的一半的输出信号。 每个除法器单元还包括耦合在电压源和分频器单元之间的电阻器组，以及用于向分频器单元提供电流的电流搅拌单元。 电阻器组的电阻和由当前搅拌单元提供的电流的大小根据输入频率而变化。

公开(公告)号：US20060055429A1

公开(公告)日：2006-03-16

申请号：US11269776

申请日：2005-11-07

申请人： Lei Wang ,  Qiang Li ,  Jianbin Wu

发明人： Lei Wang ,  Qiang Li ,  Jianbin Wu

IPC分类号： H03K19/096

CPC分类号： H03K19/0019

摘要： Dynamic low-power logic using recycled energy is disclosed. Logic circuits have a discharge path, a precharge path and a control circuit. The precharge path is a PMOS transistor coupled between the clock line and the output node of the circuit and configured to charge the output node to the loic high voltage of the clock line during a precharge phase. During an evaluation phase, the discharge path computes the desired logic function at the output node. A control circuit is connected between the output node and the clock line and to the gate of the precharge path transistor. The control circuit provides the proper gate drive, regardless of the voltage on the output node or the inputs to the discharge path, to guarantee that the precharge transistor fully charges the output node to the logic high voltage of the clock line, which provides recycled energy for operating the circuit.

摘要翻译： 公开了使用再生能源的动态低功率逻辑。 逻辑电路具有放电路径，预充电路径和控制电路。 预充电路径是耦合在时钟线和电路的输出节点之间的PMOS晶体管，并配置为在预充电阶段期间将输出节点充电到时钟线的高电压。 在评估阶段期间，放电路径计算输出节点所需的逻辑功能。 控制电路连接在输出节点与时钟线之间，连接到预充电路径晶体管的栅极。 控制电路提供适当的栅极驱动，无论输出节点上的电压或放电路径的输入如何，以确保预充电晶体管将输出节点完全充电到时钟线的逻辑高电压，从而提供循环能量 用于操作电路。

公开(公告)号：US06552574B1

公开(公告)日：2003-04-22

申请号：US10087604

申请日：2002-03-01

申请人： Lei Wang ,  Qiang Li ,  Jianbin Wu

发明人： Lei Wang ,  Qiang Li ,  Jianbin Wu

IPC分类号： H03K19096

CPC分类号： H03K19/0019

摘要： Dynamic low-power logic using recycled energy is disclosed. Logic circuits have a discharge path, a precharge path and a control circuit. The precharge path is a PMOS transistor coupled between the clock line and the output node of the circuit and configured to charge the output node to the logic high voltage of the clock line during a precharge phase. During an evaluation phase, the discharge path computes the desired logic function at the output node. A control circuit is connected between the output node and the clock line and to the gate of the precharge path transistor. The control circuit provides the proper gate drive, regardless of the voltage on the output node or the inputs to the discharge path, to guarantee that the precharge transistor fully charges the output node to the logic high voltage of the clock line, which provides recycled energy for operating the circuit.

摘要翻译： 公开了使用再生能源的动态低功率逻辑。 逻辑电路具有放电路径，预充电路径和控制电路。 预充电路径是耦合在时钟线和电路的输出节点之间的PMOS晶体管，并配置为在预充电阶段期间将输出节点充电到时钟线的逻辑高电压。 在评估阶段期间，放电路径计算输出节点所需的逻辑功能。 控制电路连接在输出节点与时钟线之间，连接到预充电路径晶体管的栅极。 控制电路提供适当的栅极驱动，无论输出节点上的电压或放电路径的输入如何，以确保预充电晶体管将输出节点完全充电到时钟线的逻辑高电压，从而提供循环能量 用于操作电路。

公开(公告)号：USD457336S1

公开(公告)日：2002-05-21

申请号：US29139547

申请日：2001-04-02

申请人： Luhao Leng ,  Qiang Li

设计人： Luhao Leng ,  Qiang Li

公开(公告)号：US11479572B2

公开(公告)日：2022-10-25

申请号：US17492597

申请日：2021-10-02

申请人： Zining Liu ,  Qiang Li ,  Yahui Liu

发明人： Zining Liu ,  Qiang Li ,  Yahui Liu

IPC分类号： C07F9/6584 ,  C07F9/22

摘要： The invention discloses an ifosfamide intermediate, a preparation method and application thereof. The ifosfamide intermediate has formula I. The ifosfamide intermediate reacts with a chlorinating agent, and then cyclization is performed under the action of an organic base to obtain ifosfamide. Compared with the existing synthetic routes, the method of the invention has the advantages that the use of highly toxic and explosive ethyleneimine can be avoided, and the use of explosive chemicals can be avoided.

公开(公告)号：US20180205412A1

公开(公告)日：2018-07-19

申请号：US15253196

申请日：2016-08-31

申请人： Ming Yu Lin ,  Qiang Li

发明人： Ming Yu Lin ,  Qiang Li

IPC分类号： H04B1/403 ,  H04B1/3805 ,  H04B1/408

CPC分类号： H04B1/406 ,  H04B1/3805 ,  H04B1/408 ,  H04W88/06

摘要： A wireless transceiver system is disclosed. The system includes a narrow band transmitter. The narrow band transmitter includes at least a delta sigma phased locked loop (delta-sigma PLL) circuit and a non-linear low-power amplifier, where an output of the delta-sigma PLL is coupled to an input of the non-linear low-power amplifier. The system further includes a wide band transmitter. The wide band transmitter includes at least a digital to analog converter (DAC), a low pass filter, a local oscillator mixer and a linear high power amplifier, where an output of the DAC is coupled to an input of the low pass filter and an output of the low pass filter is coupled to an input of the local oscillator mixer and wherein an output of the local oscillator mixer is coupled to an input of the linear high power amplifier.

公开(公告)号：US09691180B2

公开(公告)日：2017-06-27

申请号：US13976094

申请日：2012-09-28

申请人： Qiang Li ,  Yurong Chen ,  Peng Wang ,  Yangzhou Du

发明人： Qiang Li ,  Yurong Chen ,  Peng Wang ,  Yangzhou Du

IPC分类号： G09G5/22 ,  G06T19/00 ,  G06F1/16 ,  G06F3/0481 ,  G06T11/00 ,  G11B27/10 ,  G11B27/11 ,  G06F17/30 ,  G06K9/46 ,  H04N5/225

CPC分类号： G06T19/006 ,  G06F1/1626 ,  G06F3/04815 ,  G06F17/30247 ,  G06F17/30784 ,  G06F2200/1637 ,  G06K9/46 ,  G06T11/00 ,  G11B27/105 ,  G11B27/11 ,  H04N5/225

摘要： Systems and methods may provide for obtaining or implementing augmented reality information. A logic architecture may be employed to detect a low acceleration condition with respect to an image capture device. The logic architecture may select data from a video associated with the image capture device in response to the low acceleration condition. The logic architecture may also use the data to obtain augmented reality information for the video. Additionally, the logic architecture may modify the video with the augmented reality information, or may display the video with the augmented reality information.

公开(公告)号：US09571864B2

公开(公告)日：2017-02-14

申请号：US13976450

申请日：2012-03-30

申请人： Yangzhou Du ,  Yurong Chen ,  Qiang Li ,  Wenlong Li

发明人： Yangzhou Du ,  Yurong Chen ,  Qiang Li ,  Wenlong Li

IPC分类号： H04H60/33 ,  H04N7/10 ,  H04N21/234 ,  H04N21/2543 ,  H04N21/485 ,  H04N21/488 ,  H04N21/2743

CPC分类号： H04N21/23418 ,  H04N21/25435 ,  H04N21/2743 ,  H04N21/485 ,  H04N21/4854 ,  H04N21/4882

摘要： Techniques for media quality control may include receiving media information and determining the quality of the media information. The media information may be presented when the quality of the media information meets a quality control threshold. A warning may be generated when the quality of the media information does not meet the quality control threshold. Other embodiments are described and claimed.

摘要翻译： 用于媒体质量控制的技术可以包括接收媒体信息并确定媒体信息的质量。 当媒体信息的质量满足质量控制阈值时，可以呈现媒体信息。 当媒体信息的质量不符合质量控制阈值时，可能会产生警告。 描述和要求保护其他实施例。

公开(公告)号：US09471829B2

公开(公告)日：2016-10-18

申请号：US13997296

申请日：2011-03-31

申请人： Ang Liu ,  Yangzhou Du ,  Tao Wang ,  Jianguo Li ,  Qiang Li ,  Yimin Zhang

发明人： Ang Liu ,  Yangzhou Du ,  Tao Wang ,  Jianguo Li ,  Qiang Li ,  Yimin Zhang

IPC分类号： G06K9/00 ,  G06K9/46 ,  G06K9/62

CPC分类号： G06K9/00248 ,  G06K9/00281 ,  G06K9/6209

摘要： Detecting facial landmarks in a face detected in an image may be performed by first cropping a face rectangle region of the detected face in the image and generating an integral image based at least in part on the face rectangle region. Next, a cascade classifier may be executed for each facial landmark of the face rectangle region to produce one response image for each facial landmark based at least in part on the integral image. A plurality of Active Shape Model (ASM) initializations may be set up. ASM searching may be performed for each of the ASM initializations based at least in part on the response images, each ASM search resulting in a search result having a cost. Finally, a search result of the ASM searches having a lowest cost function may be selected, the selected search result indicating locations of the facial landmarks in the image.

摘要翻译： 可以通过首先裁剪图像中检测到的面部的面部矩形区域并且至少部分地基于面部矩形区域来生成整体图像来检测在图像中检测到的面部中的面部界标。 接下来，可以对面部矩形区域的每个面部标记执行级联分类器，以至少部分地基于积分图像来为每个面部标记产生一个响应图像。 可以设置多个活动形状模型（ASM）初始化。 可以至少部分地基于响应图像来对每个ASM初始化执行ASM搜索，每个ASM搜索导致搜索结果具有成本。 最后，可以选择具有最低成本函数的ASM搜索的搜索结果，所选择的搜索结果指示图像中的面部地标的位置。