公开(公告)号：US20190362668A1

公开(公告)日：2019-11-28

申请号：US16441593

申请日：2019-06-14

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kei TAKAHASHI

IPC: G09G3/20 ,  H05K5/00 ,  H01L27/32 ,  H01L27/12 ,  G09G3/3266 ,  G09G3/3225 ,  G06F3/041 ,  G06F1/16 ,  G09G3/36 ,  G09G3/3291

Abstract: A grayscale voltage generator circuit that is less likely to be influenced by the offset voltage is provided. The grayscale voltage generator circuit is a semiconductor device that includes a D/A converter circuit, a first Gm amplifier, a second Gm amplifier, a current control circuit, an output buffer, and a selector circuit. The D/A converter circuit generates a first voltage and a second voltage from an upper bit of a digital signal. The current control circuit generates a first current from a lower bit of the digital signal and functions as a current source of the first Gm amplifier. The output buffer generates a third voltage from currents output from the first Gm amplifier and the second Gm amplifier. The third voltage is input to the second Gm amplifier. The selector circuit selects voltages that are to be input to the first Gm amplifier and the second Gm amplifier.

公开(公告)号：US20190355760A1

公开(公告)日：2019-11-21

申请号：US16525846

申请日：2019-07-30

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kei TAKAHASHI ,  Hiroyuki MIYAKE

IPC: H01L27/12 ,  G09G3/3266 ,  G09G3/3225 ,  G09G3/3233

Abstract: A display device including a display portion with an extremely high resolution is provided. The display device includes a pixel circuit and a light-emitting element. The pixel circuit includes a first element layer including a first transistor and a second element layer including a second transistor. A channel formation region of the first transistor includes silicon. The first transistor has a function of driving the light-emitting element. The second transistor functions as a switch. A channel formation region of the second transistor includes a metal oxide. The metal oxide functions as a semiconductor. The second element layer is provided over the first element layer.

公开(公告)号：US20190088785A1

公开(公告)日：2019-03-21

申请号：US16121700

申请日：2018-09-05

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Hiroyuki MIYAKE ,  Kei TAKAHASHI ,  Kouhei TOYOTAKA ,  Masashi TSUBUKU ,  Kosei NODA ,  Hideaki KUWABARA

IPC: H01L29/786 ,  H01L29/26 ,  H01L23/66 ,  H01L27/12 ,  H01L27/088 ,  G06K19/077 ,  H01L29/66 ,  H01L29/24 ,  H01L21/8236 ,  G11C7/00 ,  G11C19/28 ,  H02M3/07

Abstract: An object is to reduce leakage current and parasitic capacitance of a transistor used for an LSI, a CPU, or a memory. A semiconductor integrated circuit such as an LSI, a CPU, or a memory is manufactured using a thin film transistor in which a channel formation region is formed using an oxide semiconductor which becomes an intrinsic or substantially intrinsic semiconductor by removing impurities which serve as electron donors (donors) from the oxide semiconductor and has larger energy gap than that of a silicon semiconductor. With use of a thin film transistor using a highly purified oxide semiconductor layer with sufficiently reduced hydrogen concentration, a semiconductor device with low power consumption due to leakage current can be realized.

公开(公告)号：US20180226034A1

公开(公告)日：2018-08-09

申请号：US15884863

申请日：2018-01-31

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kei TAKAHASHI

IPC: G09G3/36 ,  G02F1/1335 ,  G02F1/1333 ,  G06F3/041

CPC classification number: G09G3/3611 ,  G02F1/133345 ,  G02F1/13338 ,  G02F1/133553 ,  G06F1/3262 ,  G06F3/0412 ,  G06F2203/04103 ,  G09G3/20 ,  G09G2310/027 ,  G09G2310/0289 ,  G09G2310/0291

Abstract: To provide a novel semiconductor device with high convenience or high reliability. The semiconductor device includes a D/A converter circuit and an amplifier including an operational amplifier and an offset adjustment circuit. The operational amplifier includes a gm amplifier, a current/voltage converter circuit, and a switch. The gm amplifier supplies a first current on the basis of a voltage between a first terminal and a second terminal. The switch controls an electrical connection between a node N3 and the second terminal on the basis of an enable signal. The offset adjustment circuit supplies a correction current to a node N1 and a node N2 such that the potential of the node N3 becomes closer to the potential of the second terminal. The current/voltage converter circuit supplies a first voltage to the node N3 on the basis of the first current and the correction current.

公开(公告)号：US20180114506A1

公开(公告)日：2018-04-26

申请号：US15787924

申请日：2017-10-19

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kei TAKAHASHI ,  Shunpei YAMAZAKI

IPC: G09G5/12 ,  G06F3/044

CPC classification number: G09G5/12 ,  G06F3/0412 ,  G06F3/0416 ,  G06F3/044 ,  G09G3/3233 ,  G09G3/3648 ,  G09G2300/023 ,  G09G2300/0426 ,  G09G2300/046 ,  G09G2300/0857 ,  G09G2310/0286 ,  G09G2310/04 ,  G09G2310/08 ,  G09G2320/0247 ,  G09G2330/021 ,  G09G2330/022

Abstract: To provide a display device that achieves both smooth input and a high detection sensitivity on a touch sensor unit. The display device includes a display unit and the touch sensor unit. The display device has three operation modes: normal display in which the entire display region is rewritten, partial IDS driving in which part of the display region is rewritten, and IDS driving in which the entire display region is not rewritten. The detection operation by the touch sensor unit is performed at a time different from the time of performing the rewriting operation of the display region, so that a high detection sensitivity is achieved. Furthermore, a period of performing the detection operation in each of the partial IDS driving and the IDS driving is set longer than a period of performing the detection operation in the normal display, which enables smooth input.

公开(公告)号：US20180088705A1

公开(公告)日：2018-03-29

申请号：US15575487

申请日：2016-05-18

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kei TAKAHASHI

IPC: G06F3/044

CPC classification number: G06F3/044 ,  G06F3/0412 ,  G06F3/0418 ,  G06F2203/04102 ,  G06F2203/04103 ,  G06F2203/04111 ,  G06F2203/04112

Abstract: A touch panel or the like having a novel structure in which an influence of noise of an electrode included in an organic EL element on an electrode for touch sensing can be suppressed is provided.A voltage of the electrode for touch sensing and a voltage for reference are input to input terminals of an operational amplifier, and in an integrator circuit in which a change in capacitance due to touch sensing is sensed, the input terminal to which the voltage for reference is supplied is connected to a common electrode included in the organic EL element. Such a structure does not amplify but can cancel noise of the electrode for touch sensing, on which noise of the common electrode is superimposed.

公开(公告)号：US20170293171A1

公开(公告)日：2017-10-12

申请号：US15479835

申请日：2017-04-05

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Daisuke KUBOTA ,  Kei TAKAHASHI ,  Yuji IWAKI ,  Hisao IKEDA ,  Kohei YOKOYAMA

IPC: G02F1/1368 ,  G02F1/1333 ,  H01L27/32

CPC classification number: G02F1/1368 ,  G02F1/133345 ,  G02F1/133603 ,  G02F2001/133612 ,  G02F2201/44 ,  G02F2202/10 ,  G02F2202/28 ,  G02F2203/02 ,  H01L27/1225 ,  H01L27/15 ,  H01L27/3232 ,  H01L27/3262 ,  H01L29/7869 ,  H01L51/003 ,  H01L51/0097 ,  H01L2251/5338 ,  H01L2251/558 ,  Y02E10/549

Abstract: Power consumption of a display device is reduced. The display quality of the display device is improved. A high-quality image is displayed regardless of a usage environment. A light-weight and non-breakable display device is provided. In the display device, a first display panel and a second display panel are bonded to each other with an adhesive layer. The first display panel includes first pixels that include reflective liquid crystal elements. The second display panel includes second pixels that include light-emitting elements. The first display panel includes a first resin layer positioned closest to the adhesive layer. The second display panel includes a second resin layer positioned closest to the adhesive layer. The thickness of each of the first resin layer and the second resin layer is 0.1 μm or more and 3 μm or less.

公开(公告)号：US20170186777A1

公开(公告)日：2017-06-29

申请号：US15375453

申请日：2016-12-12

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kouhei TOYOTAKA ,  Kei TAKAHASHI ,  Hideaki SHISHIDO ,  Koji KUSUNOKI

IPC: H01L27/12 ,  H01L29/786 ,  H01L29/49 ,  H01L29/04

CPC classification number: H01L27/1225 ,  H01L27/124 ,  H01L27/1266 ,  H01L27/3262 ,  H01L29/045 ,  H01L29/4908 ,  H01L29/78648 ,  H01L29/7869

Abstract: A novel display device or the like in which a transistor connected to a scan line has small gate capacitance is provided. A novel display device or the like in which a scan line has low resistance is provided. A novel display device or the like in which pixels can be arranged with high density is provided. A novel display device or the like that can be manufactured without an increase in cost is provided. In a transistor including a first gate electrode and a second gate electrode, the first gate electrode is formed using a metal material with low resistance and the second gate electrode is formed using a metal oxide material that can reduce oxygen vacancies in an oxide semiconductor layer. The first gate electrode is connected to the scan line, and the second gate electrode is connected to a wiring to which a constant potential is supplied.

公开(公告)号：US20170154560A1

公开(公告)日：2017-06-01

申请号：US15358385

申请日：2016-11-22

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kei TAKAHASHI

IPC: G09G3/20 ,  H05K5/00 ,  G09G3/3266 ,  H01L27/32 ,  G06F3/041 ,  G09G3/3225 ,  G06F1/16 ,  H01L27/12

CPC classification number: G09G3/2007 ,  G06F1/1626 ,  G06F1/163 ,  G06F3/041 ,  G09G3/2003 ,  G09G3/3225 ,  G09G3/3233 ,  G09G3/3266 ,  G09G3/3291 ,  G09G3/3688 ,  G09G3/3696 ,  G09G2300/0828 ,  G09G2300/0842 ,  G09G2310/027 ,  G09G2310/0289 ,  G09G2310/0291 ,  G09G2310/08 ,  G09G2320/0233 ,  G09G2330/028 ,  H01L27/1225 ,  H01L27/3276 ,  H05K5/0017 ,  H05K5/0086

Abstract: A grayscale voltage generator circuit that is less likely to be influenced by the offset voltage is provided. The grayscale voltage generator circuit is a semiconductor device that includes a D/A converter circuit, a first Gm amplifier, a second Gm amplifier, a current control circuit, an output buffer, and a selector circuit. The D/A converter circuit generates a first voltage and a second voltage from an upper bit of a digital signal. The current control circuit generates a first current from a lower bit of the digital signal and functions as a current source of the first Gm amplifier. The output buffer generates a third voltage from currents output from the first Gm amplifier and the second Gm amplifier. The third voltage is input to the second Gm amplifier. The selector circuit selects voltages that are to be input to the first Gm amplifier and the second Gm amplifier.

公开(公告)号：US20170101021A1

公开(公告)日：2017-04-13

申请号：US15387077

申请日：2016-12-21

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Junpei MOMO ,  Hiroyuki MIYAKE ,  Kei TAKAHASHI

IPC: B60L11/18 ,  G01R31/36 ,  H02J7/00

CPC classification number: B60L11/1816 ,  B60L11/182 ,  G01R31/3606 ,  H01M4/625 ,  H01M10/0525 ,  H01M10/44 ,  H02J7/0052 ,  H02J7/0057 ,  H02J7/0068 ,  Y02E60/122 ,  Y02T10/7011

Abstract: An object is to inhibit a decrease in the capacity of a power storage device or to compensate the capacity, by adjusting or rectifying an imbalance between a positive electrode and a negative electrode, which is caused by decomposition of an electrolyte solution at the negative electrode. Provided is a charging method of a power storage device including a positive electrode using an active material that exhibits two-phase reaction, a negative electrode, and an electrolyte solution. The method includes the steps of, after constant current charging, performing constant voltage charging with a voltage that does not cause decomposition of the electrolyte solution until a charging current becomes lower than or equal to a lower current value limit; and after the constant voltage charging, performing additional charging with a voltage that causes decomposition of the electrolyte solution until a resistance of the power storage device reaches a predetermined resistance.