公开(公告)号：US20200346925A1

公开(公告)日：2020-11-05

申请号：US16934144

申请日：2020-07-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chun-Wen Cheng ,  Chia-Hua Chu

IPC: B81C1/00 ,  H01L23/532 ,  H01L21/82

Abstract: An integrated circuit (IC) with an integrated microelectromechanical systems (MEMS) structure is provided. In some embodiments, the IC comprises a semiconductor substrate, a back-end-of-line (BEOL) interconnect structure, the integrated MEMS structure, and a cavity. The BEOL interconnect structure is over the semiconductor substrate, and comprises wiring layers stacked in a dielectric region. Further, an upper surface of the BEOL interconnect structure is planar or substantially planar. The integrated MEMS structure overlies and directly contacts the upper surface of the BEOL interconnect structure, and comprises an electrode layer. The cavity is under the upper surface of the BEOL interconnect structure, between the MEMS structure and the BEOL interconnect structure.

公开(公告)号：US20200322733A1

公开(公告)日：2020-10-08

申请号：US16907657

申请日：2020-06-22

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chun-Wen Cheng ,  Chia-Hua Chu ,  Chun Yin Tsai

IPC: H04R19/04 ,  H04R19/00 ,  H04R31/00

Abstract: AMEMS microphone includes a backplate that has a plurality of open areas, and a diaphragm spaced apart from the backplate. The diaphragm is deformable by sound waves to cause gaps between the backplate and the diaphragm being changed at multiple locations on the diaphragm. The diaphragm includes a plurality of anchor areas, located near a boundary of the diaphragm, which is fixed relative to the backplate. The diaphragm also includes multiple vent valves. Examples of the vent valve include a wing vent valve and a vortex vent valve.

公开(公告)号：US20200317506A1

公开(公告)日：2020-10-08

申请号：US16908243

申请日：2020-06-22

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Chia Liu ,  Chia-Hua Chu ,  Chun-Wen Cheng

IPC: B81B7/00 ,  B81C1/00

Abstract: Representative methods for sealing MEMS devices include depositing insulating material over a substrate, forming conductive vias in a first set of layers of the insulating material, and forming metal structures in a second set of layers of the insulating material. The first and second sets of layers are interleaved in alternation. A dummy insulating layer is provided as an upper-most layer of the first set of layers. Portions of the first and second set of layers are etched to form void regions in the insulating material. A conductive pad is formed on and in a top surface of the insulating material. The void regions are sealed with an encapsulating structure. At least a portion of the encapsulating structure is laterally adjacent the dummy insulating layer, and above a top surface of the conductive pad. An etch is performed to remove at least a portion of the dummy insulating layer.

公开(公告)号：US10745271B2

公开(公告)日：2020-08-18

申请号：US16587274

申请日：2019-09-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chun-Wen Cheng ,  Chia-Hua Chu

IPC: H01L23/532 ,  B81C1/00 ,  H01L21/82

Abstract: An integrated circuit (IC) with an integrated microelectromechanical systems (MEMS) structure is provided. In some embodiments, the IC comprises a semiconductor substrate, a back-end-of-line (BEOL) interconnect structure, the integrated MEMS structure, and a cavity. The BEOL interconnect structure is over the semiconductor substrate, and comprises wiring layers stacked in a dielectric region. Further, an upper surface of the BEOL interconnect structure is planar or substantially planar. The integrated MEMS structure overlies and directly contacts the upper surface of the BEOL interconnect structure, and comprises an electrode layer. The cavity is under the upper surface of the BEOL interconnect structure, between the MEMS structure and the BEOL interconnect structure.

公开(公告)号：US10513429B2

公开(公告)日：2019-12-24

申请号：US15285032

申请日：2016-10-04

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chun-Wen Cheng ,  Chia-Hua Chu

IPC: B81C1/00

Abstract: Processes for integrating complementary metal-oxide-semiconductor (CMOS) devices with microelectromechanical systems (MEMS) devices are provided. In some embodiments, the MEMS devices are formed on a sacrificial substrate or wafer, the sacrificial substrate or wafer is bonded to a CMOS die or wafer, and the sacrificial substrate or wafer is removed. In other embodiments, the MEMS devices are formed over a sacrificial region of a CMOS die or wafer and the sacrificial region is subsequently removed. Integrated circuit (ICs) resulting from the processes are also provided.

公开(公告)号：US10273144B2

公开(公告)日：2019-04-30

申请号：US15626764

申请日：2017-06-19

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Chia Liu ,  Chia-Hua Chu ,  Chun-Wen Cheng ,  Kuei-Sung Chang ,  Jung-Huei Peng

IPC: H01L29/82 ,  B81B3/00 ,  B81B7/02

Abstract: The present disclosure relates to a microelectromechanical systems (MEMS) package having two MEMS devices with different pressures, and an associated method of formation. In some embodiments, the (MEMS) package includes a device substrate and a cap substrate bonded together. The device substrate includes a first trench and a second trench. A first MEMS device is disposed over the first trench and a second MEMS device is disposed over the second trench. A first stopper is raised from a first trench bottom surface of the first trench but below a top surface of the device substrate and a second stopper is raised from a second trench bottom surface of the second trench but below the top surface of the device substrate. A first depth of the first trench is greater than a second depth of the second trench.

公开(公告)号：US20190112183A1

公开(公告)日：2019-04-18

申请号：US16211681

申请日：2018-12-06

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Chia Liu ,  Chia-Hua Chu ,  Chun-Wen Cheng ,  Jung-Huei Peng

IPC: B81C1/00

Abstract: The present disclosure, in some embodiments, relates to an integrated chip structure. The integrated chip structure has a plurality of interconnect layers disposed within a dielectric structure over a substrate. A passivation layer is over the dielectric structure. A sensing electrode and a bonding electrode have bottom surfaces directly contacting the passivation layer. A microelectromechanical systems (MEMS) substrate is vertically separated from the sensing electrode. The bonding electrode is electrically connected to the MEMs substrate and to one or more of the plurality of interconnect layers. An electrode extension via is configured to electrically connect the sensing electrode to one or more of the plurality of interconnect layers.

公开(公告)号：US20190055120A1

公开(公告)日：2019-02-21

申请号：US16167912

申请日：2018-10-23

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chun-Wen Cheng ,  Chia-Hua Chu

IPC: B81C1/00 ,  H01L23/532 ,  H01L21/82

CPC classification number: B81C1/00246 ,  B81C2203/0735 ,  B81C2203/0771 ,  H01L21/82 ,  H01L23/53295 ,  H01L2924/1461

Abstract: An integrated circuit (IC) with an integrated microelectromechanical systems (MEMS) structure is provided. In some embodiments, the IC comprises a semiconductor substrate, a back-end-of-line (BEOL) interconnect structure, the integrated MEMS structure, and a cavity. The BEOL interconnect structure is over the semiconductor substrate, and comprises wiring layers stacked in a dielectric region. Further, an upper surface of the BEOL interconnect structure is planar or substantially planar. The integrated MEMS structure overlies and directly contacts the upper surface of the BEOL interconnect structure, and comprises an electrode layer. The cavity is under the upper surface of the BEOL interconnect structure, between the MEMS structure and the BEOL interconnect structure.

公开(公告)号：US10138116B2

公开(公告)日：2018-11-27

申请号：US15716676

申请日：2017-09-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chun-Wen Cheng ,  Chia-Hua Chu

IPC: H01L23/532 ,  B81C1/00 ,  H01L21/82

Abstract: An integrated circuit (IC) with an integrated microelectromechanical systems (MEMS) structure is provided. In some embodiments, the IC comprises a semiconductor substrate, a back-end-of-line (BEOL) interconnect structure, the integrated MEMS structure, and a cavity. The BEOL interconnect structure is over the semiconductor substrate, and comprises wiring layers stacked in a dielectric region. Further, an upper surface of the BEOL interconnect structure is planar or substantially planar. The integrated MEMS structure overlies and directly contacts the upper surface of the BEOL interconnect structure, and comprises an electrode layer. The cavity is under the upper surface of the BEOL interconnect structure, between the MEMS structure and the BEOL interconnect structure.

公开(公告)号：US09910009B2

公开(公告)日：2018-03-06

申请号：US15661798

申请日：2017-07-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Alexander Kalnitsky ,  Yi-Shao Liu ,  Kai-Chih Liang ,  Chia-Hua Chu ,  Chun-Ren Cheng ,  Chun-Wen Cheng

IPC: H01L51/05 ,  G01N27/414 ,  H01L27/12 ,  H01L21/84 ,  H01L51/00

CPC classification number: G01N27/4145 ,  G01N27/414 ,  G01N27/4148 ,  H01L21/84 ,  H01L27/1203 ,  H01L51/0093

Abstract: The present disclosure provides a bio-field effect transistor (BioFET) and a method of fabricating a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device may include a substrate; a gate structure disposed on a first surface of the substrate and an interface layer formed on the second surface of the substrate. The interface layer may allow for a receptor to be placed on the interface layer to detect the presence of a biomolecule or bio-entity.