Digital isolator
    51.
    发明授权

    公开(公告)号:US10038403B2

    公开(公告)日:2018-07-31

    申请号:US15640168

    申请日:2017-06-30

    CPC classification number: H03D3/00 H04L25/0268

    Abstract: Several circuits and methods for transferring an input data signal in a digital isolator are disclosed. In an embodiment, the digital isolator includes an isolation element, input circuit, and output circuit. The isolation element includes at least one input node and at least one output node, the input circuit is electronically coupled to the input node and generates modulated differential data signals based on modulating the input data signal on a carrier signal. The input circuit operates using a first supply voltage with respect to a first ground. The output circuit is electronically coupled to the output node to receive the modulated differential data signals, operates using a second supply voltage with respect to a second ground and includes a frequency-shift keying demodulator configured to generate a demodulated data signal in response to detection of presence of the carrier signal. The output circuit further generates an output data signal.

    FLL OSCILLATOR/CLOCK WITH AN FLL CONTROL LOOP INCLUDING A SWITCHED CAPACITOR RESISTIVE DIVIDER
    54.
    发明申请
    FLL OSCILLATOR/CLOCK WITH AN FLL CONTROL LOOP INCLUDING A SWITCHED CAPACITOR RESISTIVE DIVIDER 有权
    FLL振荡器/具有FLL控制环的时钟,包括开关电容电阻分压器

    公开(公告)号:US20160105187A1

    公开(公告)日:2016-04-14

    申请号:US14588293

    申请日:2014-12-31

    Abstract: An FLL (frequency locked loop) oscillator/clock generator includes a free-running oscillator (such as a ring oscillator), and generates an FLL_clk with an FLL-controlled frequency fOSC. The FLL control loop includes a switched capacitor resistor divider that converts fOSC to a resistance, generating an FLL feedback voltage Vfosc used to generate a loop control signal OSC_cntrl input to the oscillator. In response, the oscillator frequency locks FLL_clk to fosc. In an example implementation, the FLL oscillator/clock operates with spread spectrum clocking (SSC) that provides triangular SSC modulation based on a truncated RC transition voltage generated as a negative feedback to an RC relaxation oscillator, with truncation based on switched tripping threshold voltages generated a positive feedback to the RC relaxation oscillator.

    Abstract translation: FLL(锁频环)振荡器/时钟发生器包括一个自由振荡器(例如环形振荡器),并产生具有FLL控制频率fOSC的FLL_clk。 FLL控制回路包括将fOSC转换为电阻的开关电容电阻分压器,产生用于产生输入到振荡器的回路控制信号OSC_cntrl的FLL反馈电压Vfosc。 作为响应,振荡器频率将FLL_clk锁定到fosc。 在示例实现中,FLL振荡器/时钟以扩频时钟(SSC)工作,该扩频频谱时钟(SSC)基于产生为RC松弛振荡器的负反馈的截断RC转换电压提供三角形SSC调制,基于产生的切换跳闸阈值电压进行截断 对RC松弛振荡器的正反馈。

    DIGITAL ISOLATOR
    55.
    发明申请
    DIGITAL ISOLATOR 有权
    数字隔离器

    公开(公告)号:US20140169038A1

    公开(公告)日:2014-06-19

    申请号:US14103386

    申请日:2013-12-11

    CPC classification number: H03D3/00 H04L25/0268

    Abstract: Several circuits and methods for transferring an input data signal in a digital isolator are disclosed. In an embodiment, the digital isolator includes an isolation element, input circuit, and output circuit. The isolation element includes at least one input node and at least one output node, the input circuit is electronically coupled to the input node and generates modulated differential data signals based on modulating the input data signal on a carrier signal. The input circuit operates using a first supply voltage with respect to a first ground. The output circuit is electronically coupled to the output node to receive the modulated differential data signals, operates using a second supply voltage with respect to a second ground and includes a frequency-shift keying demodulator configured to generate a demodulated data signal in response to detection of presence of the carrier signal. The output circuit further generates an output data signal.

    Abstract translation: 公开了用于在数字隔离器中传送输入数据信号的几种电路和方法。 在一个实施例中,数字隔离器包括隔离元件,输入电路和输出电路。 隔离元件包括至少一个输入节点和至少一个输出节点,输入电路电耦合到输入节点,并且基于在载波信号上调制输入数据信号来生成调制的差分数据信号。 输入电路使用相对于第一地的第一电源电压来工作。 输出电路电耦合到输出节点以接收经调制的差分数据信号,使用相对于第二接地的第二电源电压进行操作,并且包括频移键控解调器,配置为响应于检测到的信号而产生解调数据信号 存在载波信号。 输出电路还产生输出数据信号。

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