公开(公告)号：US07750670B2

公开(公告)日：2010-07-06

申请号：US12185467

申请日：2008-08-04

申请人： Kenneth J. Goodnow ,  Clarence R. Ogilvie ,  Christopher B. Reynolds ,  Jack R. Smith ,  Sebastian T. Ventrone

发明人： Kenneth J. Goodnow ,  Clarence R. Ogilvie ,  Christopher B. Reynolds ,  Jack R. Smith ,  Sebastian T. Ventrone

IPC分类号： H03K19/173

CPC分类号： H03K19/17752 ,  G06F15/7867 ,  H03K19/17756 ,  H03K19/1776

摘要： A reconfigurable logic array (RLA) having a logic capacity and configured to process a function having a total logic requirement that exceeds the logic capacity of the RLA. The RLA includes first and second storage regions and a plurality of programmable logic elements located between the first and second storage regions. When the function is parsed into a plurality of functional blocks, this configuration allows the RLA to process the function by sequentially processing the functional blocks in alternating directions within the RLA, using the plurality of programmable logic elements to sequentially process each of the functional blocks and using the first and second storage regions to temporarily hold the input and output for that one of the functional blocks.

摘要翻译： 具有逻辑容量并被配置为处理具有超过RLA的逻辑容量的总逻辑要求的功能的可重构逻辑阵列（RLA）。 RLA包括第一和第二存储区域以及位于第一和第二存储区域之间的多个可编程逻辑元件。 当功能被解析成多个功能块时，该配置允许RLA通过在RLA内沿交替方向依次处理功能块来处理功能，使用多个可编程逻辑元件来顺序地处理每个功能块和 使用第一和第二存储区域临时保持该功能块的输入和输出。

公开(公告)号：US07732949B2

公开(公告)日：2010-06-08

申请号：US11550573

申请日：2006-10-18

申请人： Kenneth J. Goodnow ,  Clarence R. Ogilvie ,  Sebastian T. Ventrone ,  Keith R. Williams

发明人： Kenneth J. Goodnow ,  Clarence R. Ogilvie ,  Sebastian T. Ventrone ,  Keith R. Williams

IPC分类号： G05F3/06 ,  G06F1/00

CPC分类号： C09K11/77 ,  G06F1/3203

摘要： A system and method of predicting power events in intermittent power environments and dispatching computational operations of an integrated circuit accordingly. A power management prediction system includes a controller executing a prediction algorithm, an arrangement of computation circuitry, a non-volatile storage device containing a power requirements log and a power history log, a clock generator, an intermittent power source, and a power monitor circuit. A method of predicting intermittent power events and dispatching computational operations includes: storing power requirements of each computational operation, monitoring the intermittent power source to generate a history log, predicting a subsequent power event based on the history log, retrieving actual power requirements of one or more computational operations, comparing the predicted power event with actual power requirements, determining whether actual power requirements are satisfied, dispatching one or more computational operations that correspond to one or more actual power events, or performing an error recovery operation.

摘要翻译： 一种在间歇电力环境中预测电力事件并相应地调度集成电路的计算操作的系统和方法。 功率管理预测系统包括执行预测算法的控制器，计算电路的布置，包含电力需求日志和电力历史记录的非易失性存储装置，时钟发生器，间歇电源和功率监视电路 。 一种预测间歇功率事件和调度计算操作的方法包括：存储每个计算操作的功率需求，监测间歇电源以生成历史日志，基于历史日志预测随后的功率事件，检索一个或者 更多的计算操作，将预测功率事件与实际功率需求进行比较，确定是否满足实际功率需求，调度与一个或多个实际功率事件相对应的一个或多个计算操作，或执行错误恢复操作。

公开(公告)号：US20090276644A1

公开(公告)日：2009-11-05

申请号：US12114038

申请日：2008-05-02

申请人： Kenneth J. Goodnow ,  Stephen G. Shuma ,  Peter A. Twombly

发明人： Kenneth J. Goodnow ,  Stephen G. Shuma ,  Peter A. Twombly

IPC分类号： G06F1/00

CPC分类号： G06F1/26 ,  G06F1/3246 ,  G06F1/329 ,  Y02D10/24

摘要： A design structure for dynamic integrated circuit power distribution and control is disclosed. The design structure includes an external power consumption target generator configured to generate a power dissipation target for one or more integrated circuits. The design structure also includes a first integrated circuit that includes an IC power control unit coupled to the external power consumption target generator. The first integrated circuit also includes a first plurality of functional units, each functional unit of the first plurality including a unit power level control and a first power control grid coupling the IC power control unit to one or more of the first plurality of functional units. The IC power control unit is configured to generate a mode control signal which places at least one of plurality of functional units into a first mode of operation based upon the power consumption target.

摘要翻译： 公开了一种用于动态集成电路配电和控制的设计结构。 该设计结构包括被配置为产生一个或多个集成电路的功耗目标的外部功耗目标发生器。 该设计结构还包括第一集成电路，其包括耦合到外部功耗目标发生器的IC功率控制单元。 第一集成电路还包括第一多个功能单元，第一多个功能单元的每个功能单元包括单元功率电平控制和将IC功率控制单元耦合到第一多个功能单元中的一个或多个的第一功率控制网格。 IC功率控制单元被配置为基于功耗目标产生将多个功能单元中的至少一个功能单元置于第一操作模式的模式控制信号。

公开(公告)号：US20090150726A1

公开(公告)日：2009-06-11

申请号：US12138480

申请日：2008-06-13

申请人： Kenneth J. Goodnow ,  Stephen G. Shuma ,  Oscar C. Strohacker ,  Mark S. Styduhar ,  Peter A. Twombly ,  Andrew S. Wienick ,  Paul S. Zuchowski

发明人： Kenneth J. Goodnow ,  Stephen G. Shuma ,  Oscar C. Strohacker ,  Mark S. Styduhar ,  Peter A. Twombly ,  Andrew S. Wienick ,  Paul S. Zuchowski

IPC分类号： G06F11/30

CPC分类号： G06F11/008

摘要： Disclosed are embodiments of a method and an associated first system for extending product life of a second system in the presence of phenomena that cause the exhibition of both performance degradation and recovery properties within system devices. The first system includes duplicate devices incorporated into the second system (e.g., on a shared bus). These duplicate devices are adapted to independently perform the same function within that second system. Reference signal generators, a reference signal comparator, a power controller and a state machine, working in combination, can be adapted to seamlessly switch performance of that same function within the second system between the duplicate devices based on a measurement of performance degradation to allow for device recovery. A predetermined policy accessible by the state machine dictates when and whether or not to initiate a switch.

摘要翻译： 公开了一种方法和相关联的第一系统的实施例，用于在存在导致在系统设备内展现性能下降和恢复性能的现象的情况下延长第二系统的产品寿命。 第一系统包括并入第二系统中的重复设备（例如，在共享总线上）。 这些重复设备适于在该第二系统内独立地执行相同的功能。 参考信号发生器，参考信号比较器，功率控制器和状态机组合起来可以适应于基于性能下降的测量来在复制设备之间的第二系统内的相同功能的无缝切换性能，以允许 设备恢复。 状态机可访问的预定策略指示何时以及是否启动切换。

公开(公告)号：US20090132732A1

公开(公告)日：2009-05-21

申请号：US11942000

申请日：2007-11-19

申请人： Serafino Bueti ,  Kenneth J. Goodnow ,  Todd E. Leonard ,  Gregory J. Mann ,  Jason M. Norman ,  Clarence R. Ogilvie ,  Peter A. Sandon ,  Charles S. Woodruff

发明人： Serafino Bueti ,  Kenneth J. Goodnow ,  Todd E. Leonard ,  Gregory J. Mann ,  Jason M. Norman ,  Clarence R. Ogilvie ,  Peter A. Sandon ,  Charles S. Woodruff

IPC分类号： G06F3/00

CPC分类号： G06F13/4027

摘要： A universal peripheral processor architecture on an integrated circuit (IC) includes first and second data buses coupled to interface logic devices for enabling communication between the first and second data buses including enabling interface of multiple signaling protocols. One or more processors communicate with the first and second data buses to manage control functions on the IC. A data path enables transfer of data between the first and second data buses, and communicates with data storage devices. A data control path enables communication between the data storage devices and the processors.

摘要翻译： 集成电路（IC）上的通用外围处理器架构包括耦合到接口逻辑器件的第一和第二数据总线，用于实现第一和第二数据总线之间的通信，包括多个信令协议的启用接口。 一个或多个处理器与第一和第二数据总线通信以管理IC上的控制功能。 数据路径能够在第​​一和第二数据总线之间传送数据，并与数据存储设备进行通信。 数据控制路径实现数据存储设备和处理器之间的通信。

公开(公告)号：US20090125744A1

公开(公告)日：2009-05-14

申请号：US11938899

申请日：2007-11-13

申请人： Kenneth J. Goodnow ,  Clarence R. Ogilvie ,  Sebastian T. Ventrone ,  Keith R. Williams

发明人： Kenneth J. Goodnow ,  Clarence R. Ogilvie ,  Sebastian T. Ventrone ,  Keith R. Williams

IPC分类号： G06F1/28

CPC分类号： G06F1/3203 ,  G06F1/3287 ,  Y02D10/171

摘要： A design structure for a system and method of predicting power events in intermittent power environments and dispatching computational operations of an integrated circuit accordingly. A power management prediction system includes a controller executing a prediction algorithm, an arrangement of computation circuitry, a non-volatile storage device containing a power requirements log and a power history log, a clock generator, an intermittent power source, and a power monitor circuit. A method of predicting intermittent power events and dispatching computational operations includes: storing power requirements of each computational operation, monitoring the intermittent power source to generate a history log, predicting a subsequent power event based on the history log, retrieving actual power requirements of one or more computational operations, comparing the predicted power event with actual power requirements, determining whether actual power requirements are satisfied, dispatching one or more computational operations that correspond to one or more actual power events, or performing an error recovery operation.

摘要翻译： 一种用于系统的设计结构以及在间歇电力环境中预测电力事件并相应地调度集成电路的计算操作的方法。 功率管理预测系统包括执行预测算法的控制器，计算电路的布置，包含电力需求日志和电力历史记录的非易失性存储装置，时钟发生器，间歇电源和功率监视电路 。 一种预测间歇功率事件和调度计算操作的方法包括：存储每个计算操作的功率需求，监测间歇电源以生成历史日志，基于历史日志预测随后的功率事件，检索一个或者 更多的计算操作，将预测功率事件与实际功率需求进行比较，确定是否满足实际功率需求，调度与一个或多个实际功率事件相对应的一个或多个计算操作，或执行错误恢复操作。

公开(公告)号：US20090058504A1

公开(公告)日：2009-03-05

申请号：US11849463

申请日：2007-09-04

申请人： Kenneth J. Goodnow ,  Stephen G. Shuma ,  Peter A. Twombly

发明人： Kenneth J. Goodnow ,  Stephen G. Shuma ,  Peter A. Twombly

IPC分类号： G05F1/10

CPC分类号： G06F1/263 ,  G06F1/266

摘要： The present disclosure is directed to self-powered voltage islands on an integrated circuit. A structure in accordance with an embodiment includes: an integrated circuit including a power source; a voltage island; and an on-board power source provided on the voltage island for powering the voltage island independently of the power source of the integrated circuit.

摘要翻译： 本公开涉及集成电路上的自供电电压岛。 根据实施例的结构包括：包括电源的集成电路; 电压岛; 以及设置在电压岛上的板载电源，用于独立于集成电路的电源为电压岛供电。

公开(公告)号：US20090024862A1

公开(公告)日：2009-01-22

申请号：US11779432

申请日：2007-07-18

申请人： Kenneth J. Goodnow ,  Clarence R. Ogilvie ,  Sebastian T. Ventrone ,  Keith Williams ,  Charles S. Woodruff

发明人： Kenneth J. Goodnow ,  Clarence R. Ogilvie ,  Sebastian T. Ventrone ,  Keith Williams ,  Charles S. Woodruff

IPC分类号： G06F1/30

CPC分类号： G06F1/3203

摘要： A method and structure to optimize computational efficiency in a low-power environment. The method includes determining an optimal point for maximizing computational efficiency in a low-power environment, and selectively controlling operation of at least one processing unit of a plurality of processing units in accordance with the determined optimal point. The structure includes a plurality of processing units, a load manager controlling selective parallel operation of at least one processing unit of the plurality of processing units, and an unregulated power source.

摘要翻译： 一种在低功耗环境下优化计算效率的方法和结构。 该方法包括确定用于在低功率环境中最大化计算效率的最佳点，以及根据所确定的最佳点选择性地控制多个处理单元中的至少一个处理单元的操作。 该结构包括多个处理单元，控制多个处理单元中的至少一个处理单元的选择性并行操作的负载管理器和未调节的电源。

公开(公告)号：US20080256503A1

公开(公告)日：2008-10-16

申请号：US11876076

申请日：2007-10-22

申请人： Kenneth J. GOODNOW ,  Clarence R. Ogilvie ,  Christopher B. Reynolds ,  Sebastian T. Ventrone ,  Keith R. Williams

发明人： Kenneth J. GOODNOW ,  Clarence R. Ogilvie ,  Christopher B. Reynolds ,  Sebastian T. Ventrone ,  Keith R. Williams

IPC分类号： G06F17/50

CPC分类号： H03K3/0315

摘要： A method and system for modulating logic clock oscillator frequency based on voltage supply. The system comprises a logic unit having a logic operation and a device to produce self-adjusting clocks to match the logic operation. The device is configured to use supply voltage as an independent variable to optimize device parameters for voltage variations. The invention is also directed to a design structure on which a circuit resides.

摘要翻译： 一种基于电压源调制逻辑时钟振荡器频率的方法和系统。 该系统包括具有逻辑操作的逻辑单元和用于产生自适应时钟以匹配逻辑运算的装置。 该器件被配置为使用电源电压作为独立变量来优化电压变化的器件参数。 本发明还涉及电路所在的设计结构。

公开(公告)号：US07437620B2

公开(公告)日：2008-10-14

申请号：US11164646

申请日：2005-11-30

申请人： Kenneth J. Goodnow ,  Stephen G. Shuma ,  Oscar C. Strohacker ,  Mark S. Styduhar ,  Peter A. Twombly ,  Andrew S. Wienick ,  Paul S. Zuchowski

发明人： Kenneth J. Goodnow ,  Stephen G. Shuma ,  Oscar C. Strohacker ,  Mark S. Styduhar ,  Peter A. Twombly ,  Andrew S. Wienick ,  Paul S. Zuchowski

IPC分类号： G06F11/00

CPC分类号： G06F11/008

摘要： Disclosed are embodiments of a method and an associated first system for extending product life of a second system in the presence of phenomena that cause the exhibition of both performance degradation and recovery properties within system devices. The first system includes duplicate devices incorporated into the second system (e.g., on a shared bus). These duplicate devices are adapted to independently perform the same function within that second system. Reference signal generators, a reference signal comparator, a power controller and a state machine, working in combination, can be adapted to seamlessly switch performance of that same function within the second system between the duplicate devices based on a measurement of performance degradation to allow for device recovery. A predetermined policy accessible by the state machine dictates when and whether or not to initiate a switch.

摘要翻译： 公开了一种方法和相关联的第一系统的实施例，用于在存在导致在系统设备内展现性能下降和恢复性能的现象的情况下延长第二系统的产品寿命。 第一系统包括并入第二系统中的重复设备（例如，在共享总线上）。 这些重复设备适于在该第二系统内独立地执行相同的功能。 参考信号发生器，参考信号比较器，功率控制器和状态机组合起来可以适应于基于性能下降的测量来在复制设备之间的第二系统内的相同功能的无缝切换性能，以允许 设备恢复。 状态机可访问的预定策略指示何时以及是否启动切换。