WEARABLE DEVICE AND METHOD FOR PROCESSING ACCELERATION DATA

    公开(公告)号:US20230029222A1

    公开(公告)日:2023-01-26

    申请号:US17481220

    申请日:2021-09-21

    Abstract: According to an embodiment, a method of processing acceleration information by a wearable device is provided, the method including: acquiring the acceleration information indicating acceleration according to movement of the wearable device; acquiring a plurality of acceleration characteristics including a plurality of characteristics of a power spectrum of the acceleration and a range of the acceleration on the basis of the acceleration information; determining characteristic values according to two characteristics determined according to a type of a disease to be monitored among the plurality of acceleration characteristics; and providing an alarm signal in response to the characteristic value falling within an abnormality range.

    APPARATUS AND METHOD FOR ERROR CORRECTION IN WIRELESS COMMUNICATION SYSTEM

    公开(公告)号:US20220399944A1

    公开(公告)日:2022-12-15

    申请号:US17890091

    申请日:2022-08-17

    Abstract: The present disclosure relates to a pre-5th-Generation (5G) or 5G communication system to be provided for supporting higher data rates Beyond 4th-Generation (4G) communication system such as Long Term Evolution (LTE). An electronic device, in a wireless communication system, may include: a processor, an antenna array, a plurality of first radio frequency (RF) paths related to a first stream, the first RF paths each including a transmit (TX) path and a receive (RX) path, and a plurality of second RF paths related to a second stream, the second RF paths each including a TX path and an RX path, and the processor may be configured to: generate a calibration signal for the antenna array, obtain characteristic information of the antenna array based on a phase difference or a gain difference between one TX path having the first stream and one RX path having the second stream obtained for each of measurement RF paths among the plurality of the first RF paths, and calibrate the plurality of the first RF paths based on the characteristic information.

    LOW-LATENCY SUBSPACE PURSUIT APPARATUS AND METHOD FOR RECONSTRUCTING COMPRESSIVE SENSING

    公开(公告)号:US20220350862A1

    公开(公告)日:2022-11-03

    申请号:US17607847

    申请日:2020-11-26

    Abstract: A subspace pursuit apparatus for compressive sensing reconstruction includes: a first inner product unit configured to calculate a correlation between a residual vector and column vectors of a sensing matrix by calculating an inner product of them; a first sorting unit coupled to the first inner product unit and configured to select K column vector indices having highest correlations, where K is a sparsity level; a second inner product unit configured to calculate a matrix for calculating a pseudo-inverse matrix required for solving a least-squares from the sensing matrix to store in the Gram matrix buffer; a Cholesky inversion unit configured to perform a Cholesky decomposition of the matrix stored in the Gram matrix buffer and calculate an inverse of a decomposed matrix; and a sparse solution estimator configured to estimate the sparse solution from a matrix value of the matrix based on the inverse of the decomposed matrix.

    ELECTRONIC DEVICE FOR CONFIGURING NEURAL NETWORK

    公开(公告)号:US20220246204A1

    公开(公告)日:2022-08-04

    申请号:US17723358

    申请日:2022-04-18

    Abstract: Disclosed are a first memory cell, a second memory cell, and an amplification circuit. The first memory cell outputs a first voltage through a first bit line or a second voltage through a second bit line, based on first input data received through a first word line and a second word line and a first weight. The second memory cell outputs a third voltage through the first bit line or a fourth voltage through the second bit line, based on second input data received through a third word line and a fourth word line and a second weight. The amplification circuit generates an output voltage having a level corresponding to a sum of a level of a voltage received through the first bit line and a level of a voltage received through the second bit line.

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