公开(公告)号：US20150199292A1

公开(公告)日：2015-07-16

申请号：US14500944

申请日：2014-09-29

Applicant: Apple Inc.

Inventor： David W. Lum ,  Thomas J. Wilson ,  Paolo Sacchetto ,  Sandro H. Pintz ,  Fenghua Zheng

IPC: G06F13/42 ,  G06F13/40

CPC classification number: G06F13/4221

Abstract: A method for simplifying the host-to-display subsystem communications and consolidating the non-volatile memory requirements into a PMIC (power management integrated circuit) is disclosed. Hardware and software resource reduction in both the client devices (located in the display subsystem) and the host System on a Chip (SOC) can be realized with a novel PMIC design. The novel PMIC design achieves the resource reduction by providing for the following features: (1) Single-point communication, (2) Single-point notification, (3) Client device status storage, (4) Client device initialization from PMIC non-volatile memory, and (5) Subsystem calibration retrieval from PMIC non-volatile memory.

Abstract translation: 公开了一种用于简化主机到显示器子系统通信并将非易失性存储器需求整合到PMIC（电力管理集成电路）中的方法。 可以通过新颖的PMIC设计来实现客户端设备（位于显示子系统中）和主机片上系统（SOC）的硬件和软件资源减少。 新型PMIC设计通过提供以下特点实现资源减少：（1）单点通信，（2）单点通知，（3）客户端设备状态存储，（4）PMIC非易失性的客户端设备初始化 存储器和（5）PMIC非易失性存储器的子系统校准检索。

公开(公告)号：US20250148730A1

公开(公告)日：2025-05-08

申请号：US19016230

申请日：2025-01-10

Applicant: Apple Inc.

Inventor： Sheng Zhang ,  Aleksandr M. Movshovich ,  Arthur Y. Zhang ,  Chaohao Wang ,  Moinul H. Khan ,  Paolo Sacchetto ,  Yunhui Hou

IPC: G06T19/00 ,  G02B27/01 ,  H04N23/667 ,  H04N23/951

Abstract: An electronic device may have a camera and a display. The display may be configured to display virtual reality content for a user in which no real-world content from the camera is displayed or mixed reality content in which a combination of real-world content from the camera and overlaid virtual reality content is displayed. Control circuitry in the device may adjust the display and camera while transitioning between virtual reality and mixed reality modes. The control circuitry may reconfigure the camera to exhibit a desired frame rate immediately upon transitioning from virtual reality mode to mixed reality mode. Transitions between modes may be accompanied by smooth transitions between frame rates to avoid visible artifacts on the display. The camera frame rate may be synchronized to the display frame rate for at least part of the transition between the virtual reality and mixed reality modes.

公开(公告)号：US12142207B2

公开(公告)日：2024-11-12

申请号：US17191009

申请日：2021-03-03

Applicant: Apple Inc.

Inventor： Shengkui Gao ,  Haifeng Li ,  Sinan Alousi ,  Marc Joseph DeVincentis ,  Yafei Bi ,  Hung Sheng Lin ,  Yi Qiao ,  Paolo Sacchetto ,  Weijun Yao ,  Pierre-Yves Emelie ,  Maofeng Yang ,  Yue Jack Chu

IPC: G09G3/3233

Abstract: A system may include an electronic display panel having pixels, where each pixel may emit light based on a respective programming signal. The system may include a memory storing a map. The processing circuitry may determine a function for each pixel from the map. The processing circuitry may determine a respective control signal based on the function and a target brightness level for each pixel to generate multiple control signals, where the respective control signal is used to generate the respective programming signal for each pixel. The processing circuitry may determine a scaling factor based at least in part on the first map and may scale at least a subset of the multiple control signals based at least in part on the scaling factor.

公开(公告)号：US11545110B2

公开(公告)日：2023-01-03

申请号：US17528183

申请日：2021-11-16

Applicant: Apple Inc.

Inventor： Maofeng Yang ,  Shengkui Gao ,  Paolo Sacchetto ,  Weijun Yao ,  Yongjun Li ,  Jiayi Jin

IPC: G09G3/3233 ,  G09G3/34 ,  G09G3/36 ,  G09G5/10 ,  G09G3/32

Abstract: A system may include an electronic display panel having pixels, where each pixel emits light based on a respective programming signal applied to the pixel. The system may also include processing circuitry to determine a respective control signal upon which the respective programing signal for each pixel is based. The processing circuitry may determine each respective control signal based at least in part on approximations of respective pixel brightness-to-data relationship as defined by a function having variables stored in memory accessible to the processing circuitry.

公开(公告)号：US11271181B1

公开(公告)日：2022-03-08

申请号：US16576615

申请日：2019-09-19

Applicant: Apple Inc.

Inventor： Maofeng Yang ,  Weijun Yao ,  Jiayi Jin ,  Paolo Sacchetto ,  Injae Hwang

IPC: H01L27/146 ,  H01L51/50 ,  G09G3/3233 ,  G09G3/14 ,  H01L27/15 ,  H01L27/28

Abstract: An electronic display having pixels and control circuitry to drive the pixels to display image data even during relatively long presentation times without visual artifacts, such as flicker, are provided. The control circuitry may cause the pixel to perform a threshold voltage sampling and pixel programming phase to store image data for the pixel while accounting for a first threshold voltage of the first transistor. Afterward, an on-bias stress phase may cause a threshold voltage of the first transistor of the plurality of transistors to reach a second threshold voltage. Following the on-bias stress phase, a first emission phase may cause the light-emitting diode to emit light in accordance with the image data, and subsequent on-bias stress phases and subsequent emission phases for the duration of the presentation time may take place without a visible flicker artifact.

公开(公告)号：US11210990B2

公开(公告)日：2021-12-28

申请号：US16325260

申请日：2017-08-15

Applicant: Apple Inc.

Inventor： Ivan Knez ,  Cheuk Chi Lo ,  Akira Matsudaira ,  Chun-Yao Huang ,  Giovanni Carbone ,  Paolo Sacchetto ,  Chaohao Wang ,  Sheng Zhang ,  Adam Adjiwibawa

IPC: G09G3/20 ,  G09G5/36 ,  G09G5/391 ,  G09G5/397

Abstract: An electronic device may have a display and a gaze tracking system. The electronic device may display images on the display that have a higher resolution in a portion of the display that overlaps a gaze location than other portions of the display. Timing controller circuitry and column driver circuitry may include interpolation and filter circuitry. The interpolation and filter circuitry may be used to perform nearest neighbor interpolation and two-dimensional spatial filtering on low resolution image data. Display driver circuitry may be configured to load higher resolution data into selected portions of a display. The display driver circuitry may include low and high resolution image data buffers and configurable row driver circuitry. Block enable transistors may be included in a display to allow selected blocks of pixels to be loaded with high resolution image data.

公开(公告)号：US11205378B1

公开(公告)日：2021-12-21

申请号：US16563610

申请日：2019-09-06

Applicant: Apple Inc.

Inventor： Maofeng Yang ,  Shengkui Gao ,  Paolo Sacchetto ,  Weijun Yao ,  Yongjun Li ,  Jiayi Jin

IPC: G09G3/3233 ,  G09G3/34 ,  G09G3/36

Abstract: A system may include an electronic display panel having pixels, where each pixel emits light based on a respective programming signal applied to the pixel. The system may also include processing circuitry to determine a respective control signal upon which the respective programing signal for each pixel is based. The processing circuitry may determine each respective control signal based at least in part on approximations of respective pixel brightness-to-data relationship as defined by a function having variables stored in memory accessible to the processing circuitry.

公开(公告)号：US20210318715A1

公开(公告)日：2021-10-14

申请号：US17178556

申请日：2021-02-18

Applicant: Apple Inc.

Inventor： Mingjing Ha ,  Kuan H. Lu ,  Paul S. Drzaic ,  Yung-Yu Hsu ,  Yong Sun ,  Zhen Zhang ,  Bulong Wu ,  Marc J. DeVincentis ,  Paolo Sacchetto ,  Han-Chieh Chang ,  Anshi Liang

IPC: G06F1/16

Abstract: An electronic device display may have pixels formed from crystalline semiconductor light-emitting diode dies, organic light-emitting diodes, or other pixel structures. The pixels may be formed in a display panel having a single substrate or an array of display panel tiles. The display panel has inwardly facing display panel contacts that mate with corresponding outwardly facing interconnect substrate contacts on an interconnect substrate. The interconnect substrate may have areas with compound curvature that are overlapped by the display panel. To enhance flexibility of the interconnect substrate, the interconnect substrate may have flexibility enhancement openings and/or may be formed from a material with a low elastic modulus such as silicone or other elastomeric material.

公开(公告)号：US11024243B2

公开(公告)日：2021-06-01

申请号：US17034894

申请日：2020-09-28

Applicant: Apple Inc.

Inventor： Chaohao Wang ,  Brijesh Tripathi ,  Christopher Philip Alan Tann ,  David S. Zalatimo ,  Guy Cote ,  Hao Nan ,  Marc Albrecht ,  Paolo Sacchetto ,  Sandro H. Pintz

IPC: G09G3/36

Abstract: An electronic device may generate content that is to be displayed on a display. The display may have an array of liquid crystal display pixels for displaying image frames of the content. The image frames may be displayed with positive and negative polarities to help reduce charge accumulation effects. A charge accumulation tracker may analyze the image frames to determine when there is a risk of excess charge accumulation. The charge accumulation tracker may analyze information on gray levels, frame duration, and frame polarity. The charge accumulation tracker may compute a charge accumulation metric for entire image frames or may process subregions of each frame separately. When subregions are processed separately, each subregion may be individually monitored for a risk of excess charge accumulation.

公开(公告)号：US20210012733A1

公开(公告)日：2021-01-14

申请号：US17034894

申请日：2020-09-28

Applicant: Apple Inc.

Inventor： Chaohao Wang ,  Brijesh Tripathi ,  Christopher Philip Alan Tann ,  David S. Zalatimo ,  Guy Cote ,  Hao Nan ,  Marc Albrecht ,  Paolo Sacchetto ,  Sandro H. Pintz

IPC: G09G3/36

Abstract: An electronic device may generate content that is to be displayed on a display. The display may have an array of liquid crystal display pixels for displaying image frames of the content. The image frames may be displayed with positive and negative polarities to help reduce charge accumulation effects. A charge accumulation tracker may analyze the image frames to determine when there is a risk of excess charge accumulation. The charge accumulation tracker may analyze information on gray levels, frame duration, and frame polarity. The charge accumulation tracker may compute a charge accumulation metric for entire image frames or may process subregions of each frame separately. When subregions are processed separately, each subregion may be individually monitored for a risk of excess charge accumulation.