公开(公告)号：US11791227B2

公开(公告)日：2023-10-17

申请号：US17317770

申请日：2021-05-11

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Kuoching Cheng ,  Yuan-Feng Chiang ,  Ya Fang Chan ,  Wen-Long Lu ,  Shih-Yu Wang

IPC: H01L23/31 ,  H01L25/065 ,  H01L21/56 ,  H01L23/538 ,  H01L23/16

CPC classification number: H01L23/31 ,  H01L21/56 ,  H01L23/16 ,  H01L23/5386 ,  H01L25/0655

Abstract: An electronic device package and a method for manufacturing an electronic device package are provided. The electronic device package includes electronic device structure which includes a first electronic device and a first encapsulant, a second electronic device, and a second encapsulant. The first encapsulant encapsulates the first electronic device. The second electronic device is adjacent to the electronic device structure. The second encapsulant encapsulates the electronic device structure and the second electronic device. A first extension line along a lateral surface of the first electronic device and a second extension line along a lateral surface of the first encapsulant define a first angle, the second extension line along the lateral surface of the first encapsulant and a third extension line along a lateral surface of the second electronic device define a second angle, and the first angle is different from the second angle.

公开(公告)号：US11694984B2

公开(公告)日：2023-07-04

申请号：US16557763

申请日：2019-08-30

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long Lu

IPC: H01L23/00 ,  H01L21/768 ,  H01L23/522 ,  H01L23/48 ,  H01L21/683

CPC classification number: H01L24/14 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/522 ,  H01L21/6836 ,  H01L2221/6834

Abstract: A package structure includes a base material, at least one electronic device, at least one encapsulant and a plurality of dummy pillars. The electronic device is electrically connected to the base material. The encapsulant covers the electronic device. The dummy pillars are embedded in the encapsulant. At least two of the dummy pillars have different heights.

公开(公告)号：US11302594B2

公开(公告)日：2022-04-12

申请号：US16738763

申请日：2020-01-09

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long Lu

IPC: H01L23/31 ,  H01L49/02 ,  H01L27/01 ,  H01L21/56

Abstract: A semiconductor package includes a substrate, an electronic component and a first dilatant layer. The electronic component is disposed on the substrate. The electronic component has a top surface, a bottom surface opposite to the top surface and a lateral surface extending between the top surface and the bottom surface. The first dilatant layer is disposed on the top surface of the electronic component and extends along the lateral surface of the electronic component.

公开(公告)号：US11189587B2

公开(公告)日：2021-11-30

申请号：US16673708

申请日：2019-11-04

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long Lu

IPC: H01L23/538 ,  H01L23/00 ,  H01L21/683 ,  H01L21/48 ,  H01L21/56 ,  H01L25/10 ,  H01L23/31

Abstract: A semiconductor device package includes an electronic component. The electronic component has an active surface, a back surface opposite to the active surface, and a lateral surface connected between the active surface and the back surface. The electronic component has an electrical contact disposed on the active surface. The semiconductor device package also includes a redistribution layer (RDL) contacting the back surface of the electronic component, a first dielectric layer surrounding the electrical contact on the active surface of the electronic component, and a second dielectric layer surrounding the lateral surface of the electronic component and the first dielectric layer. The second dielectric layer has a first sidewall in contact with the lateral surface of the electronic component and a second sidewall opposite to the first sidewall. The second sidewall of the second dielectric layer has a first portion proximal to the RDL and a second portion distal from the RDL. The first portion and the second portion define a stepped feature on the second sidewall. A method of manufacturing a semiconductor device package is also disclosed.

公开(公告)号：US11031361B2

公开(公告)日：2021-06-08

申请号：US16528347

申请日：2019-07-31

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long Lu

IPC: H01L23/00 ,  H01L25/065 ,  H01L25/00 ,  H01L21/48 ,  H01L23/31 ,  H01L23/498

Abstract: A semiconductor structure and a method of manufacturing the same are provided. The semiconductor structure includes a first semiconductor element and a first bonding structure. The first semiconductor element has a first element top surface and a first element bottom surface opposite to the element top surface. The first bonding structure is disposed adjacent to the element top surface of the first semiconductor element and includes a first electrical connector, a first insulation layer surrounding the first electrical connector, and a first metal layer surrounding the first insulation layer.

公开(公告)号：US10886149B2

公开(公告)日：2021-01-05

申请号：US16264607

申请日：2019-01-31

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long Lu

IPC: H01L21/56 ,  H01L23/31 ,  H01L21/48 ,  H01L23/00

Abstract: A semiconductor device package includes a substrate, a semiconductor device, and an underfill. The semiconductor device is disposed on the substrate. The semiconductor device includes a first lateral surface. The underfill is disposed between the substrate and the semiconductor device. The underfill includes a first lateral surface. The first lateral surface of the underfill and the first lateral surface of the semiconductor device are substantially coplanar.

公开(公告)号：US10854527B2

公开(公告)日：2020-12-01

申请号：US15990210

申请日：2018-05-25

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long Lu

IPC: H01L23/31 ,  H01L23/00 ,  H01L21/48 ,  H01L21/56 ,  H01L23/498

Abstract: A semiconductor device package includes a circuit layer, an electronic component, an electronic component, a first passivation layer and a second passivation layer. The circuit layer has a first surface. The electronic component is disposed on the first surface of the circuit layer. The first passivation layer is disposed on the first surface of the circuit layer. The first passivation layer has a first surface facing away the circuit layer. The second passivation layer is disposed on the first surface of the first passivation layer. The second passivation layer has a second surface facing away the circuit layer. A uniformity of the first surface of the first passivation layer is greater than a uniformity of the second surface of the second passivation layer.

公开(公告)号：US10796987B2

公开(公告)日：2020-10-06

申请号：US16182588

申请日：2018-11-06

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long Lu ,  Huang-Hsien Chang

IPC: H01L23/12 ,  H01L23/48 ,  H01L21/00 ,  H01L21/44 ,  H01L23/498 ,  H01L23/31 ,  H01L23/00 ,  H01L21/48

Abstract: A semiconductor packaging device includes a first patterned insulation layer, a patterned conductive layer, a semiconductor device and an encapsulant. The first patterned insulation layer has a first surface, a second surface opposite the first surface, and an island portion having the first surface. The first patterned insulation layer defines a tapered groove surrounding the island portion. The patterned conductive layer is disposed on the first surface of the island portion. The semiconductor device electrically connects to the patterned conductive layer. The encapsulant encapsulates the semiconductor device, the first patterned insulation layer and the patterned conductive layer.

公开(公告)号：US10672696B2

公开(公告)日：2020-06-02

申请号：US15821599

申请日：2017-11-22

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Jen-Kuang Fang ,  Wen-Long Lu

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/31 ,  H01L21/56

Abstract: A semiconductor device package includes an electronic component, a first substrate, a first bonding wire and a second substrate. The electronic component has a first surface. The first substrate is disposed on the first surface of the electronic component. The first bonding wire electrically connects the first substrate to the electronic component. The second substrate is disposed on the first surface of the electronic component. The second substrate defines an opening accommodating the first substrate and the first bonding wire.

公开(公告)号：US10658298B1

公开(公告)日：2020-05-19

申请号：US16179181

申请日：2018-11-02

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long Lu

IPC: H01L23/532 ,  H01L23/00 ,  H01L25/065 ,  H01L21/56 ,  H01L23/31

Abstract: A semiconductor device package includes a dielectric layer, a first conductive pattern and a first semiconductor device. The dielectric layer has a first surface, wherein a surface uniformity of the first surface is substantially equal to or less than 5%. The first conductive pattern is disposed on the first surface of the dielectric layer, wherein the first conductive pattern includes a first conductive trace, and a line width of the first conductive trace substantially ranges from about 0.5 μm and about 2 μm. The first semiconductor device is disposed on the first surface of the dielectric layer and electrically connected to the first conductive pattern.