Matrix multiplication on a systolic array

    公开(公告)号:US10769238B2

    公开(公告)日:2020-09-08

    申请号:US16576144

    申请日:2019-09-19

    Abstract: Techniques facilitating matrix multiplication on a systolic array are provided. A computer-implemented method can comprise populating, by a system operatively coupled to a processor, respective first registers of one or more processing elements of a systolic array structure with respective input data bits of a first data matrix. The one or more processing elements can comprise a first processing element that comprises a first input data bit of the first data matrix and a first activation bit of a second data matrix. The method can also include determining, by the system, at the first processing element, a first partial sum of a third data matrix. Further, the method can include streaming, by the system, the first partial sum of the third data matrix from the first processing element.

    PLANAR FABRICATION OF MICRO-NEEDLES
    64.
    发明申请

    公开(公告)号:US20200171593A1

    公开(公告)日:2020-06-04

    申请号:US16205296

    申请日:2018-11-30

    Abstract: Methods of fabricating a probe are described. In an example, a structure may be formed on a surface of a substrate. The structure may include the probe, a hinge, and an anchor arranged linearly, where an angle is formed between the probe and the hinge. The hinge may be positioned between the probe and the anchor, and the structure may be parallel to the substrate. An amount of solder may be deposited on an area of the structure that spans from a portion of the probe to a portion of the anchor, and across the hinge. The deposited solder may be reshaped by an execution of a solder reflow process. The reshape of the deposited solder may cause the probe to rotate about the hinge in order to reduce the angle between the probe and the hinge.

    GRAPH SIMILARITY ANALYTICS
    67.
    发明申请

    公开(公告)号:US20190317728A1

    公开(公告)日:2019-10-17

    申请号:US15954891

    申请日:2018-04-17

    Abstract: Techniques that facilitate graph similarity analytics are provided. In one example, a system includes an information component and a similarity component. The information component generates a first information index indicative of a first entropy measure for a first graph-structured dataset associated with a machine learning system. The information component also generates a second information index indicative of a second entropy measure for a second graph-structured dataset associated with the machine learning system. The similarity component determines similarity between the first graph-structured dataset and the second graph-structured dataset based on a graph similarity computation associated with the first information index and the second information index.

    Matrix multiplication on a systolic array

    公开(公告)号:US10261978B2

    公开(公告)日:2019-04-16

    申请号:US15842422

    申请日:2017-12-14

    Abstract: Techniques facilitating matrix multiplication on a systolic array are provided. A computer-implemented method can comprise populating, by a system operatively coupled to a processor, respective first registers of one or more processing elements of a systolic array structure with respective input data bits of a first data matrix. The one or more processing elements can comprise a first processing element that comprises a first input data bit of the first data matrix and a first activation bit of a second data matrix. The method can also include determining, by the system, at the first processing element, a first partial sum of a third data matrix. Further, the method can include streaming, by the system, the first partial sum of the third data matrix from the first processing element.

    MATRIX MULTIPLICATION ON A SYSTOLIC ARRAY
    70.
    发明申请

    公开(公告)号:US20180267938A1

    公开(公告)日:2018-09-20

    申请号:US15842422

    申请日:2017-12-14

    CPC classification number: G06F17/16

    Abstract: Techniques facilitating matrix multiplication on a systolic array are provided. A computer-implemented method can comprise populating, by a system operatively coupled to a processor, respective first registers of one or more processing elements of a systolic array structure with respective input data bits of a first data matrix. The one or more processing elements can comprise a first processing element that comprises a first input data bit of the first data matrix and a first activation bit of a second data matrix. The method can also include determining, by the system, at the first processing element, a first partial sum of a third data matrix. Further, the method can include streaming, by the system, the first partial sum of the third data matrix from the first processing element.

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