公开(公告)号：US20220405556A1

公开(公告)日：2022-12-22

申请号：US17350665

申请日：2021-06-17

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Cedric Lichtenau ,  Kailash Gopalakrishnan ,  Vijayalakshmi Srinivasan ,  Sunil K. Shukla ,  Swagath Venkataramani

IPC: G06N3/063 ,  G06N3/08 ,  G06F17/16 ,  G06F7/544 ,  G06F7/523 ,  G06F7/50

Abstract: A combined function specified by an instruction is performed. The combined function includes a plurality of operations performed as part of one invocation of the combined function. The performing the combined function includes performing a matrix multiplication of a first tensor and a second tensor to obtain one or more intermediate results. The second tensor includes an adjusted weight tensor created using a multiplier. Values of a bias tensor are added to the one or more intermediate results to obtain one or more results for the combined function. The one or more results are at least a part of an output tensor.

公开(公告)号：US11263518B2

公开(公告)日：2022-03-01

申请号：US16593284

申请日：2019-10-04

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Swagath Venkataramani ,  Shubham Jain ,  Vijayalakshmi Srinivasan ,  Leland Chang

IPC: G06N3/04 ,  G06N3/063

Abstract: A method is provided for forming a Deep Neural Network (DNN). The method includes quantizing deep learning data structures of the DNN into at least two modes using at least two scale factors, respectively. Each of the at least two modes corresponds to a respective one of the at least two scale factors. The method further includes identifying which of the at least two scale factors to use for a given one of the data structures based on a data distribution of the given one of the data structures. The quantizing step includes identifying when a tail of the given one of the data structures starts by (i) building a histogram of values in the given one of the data structures using successive bins; (ii) identifying a ratio of density between the successive bins; and (iii) checking whether the ratio of density is greater than a ratio of density threshold.

公开(公告)号：US09740497B2

公开(公告)日：2017-08-22

申请号：US14053978

申请日：2013-10-15

Applicant: International Business Machines Corporation

Inventor： Pradip Bose ,  Alper Buyuktosunoglu ,  Xiaochen Guo ,  Hillery C. Hunter ,  Jude A. Rivers ,  Vijayalakshmi Srinivasan

IPC: G06F9/38

CPC classification number: G06F9/3867 ,  G06F9/3808 ,  G06F9/3832

Abstract: A processor and a method implemented by the processor to obtain computation results are described. The processor includes a unified reuse table embedded in a processor pipeline, the unified reuse table including a plurality of entries, each entry of the plurality of entries corresponding with a computation instruction or a set of computation instructions. The processor also includes a functional unit to perform a computation based on a corresponding instruction.

公开(公告)号：US09740496B2

公开(公告)日：2017-08-22

申请号：US14019763

申请日：2013-09-06

Applicant: International Business Machines Corporation

Inventor： Pradip Bose ,  Alper Buyuktosunoglu ,  Xiaochen Guo ,  Hillery C. Hunter ,  Jude A. Rivers ,  Vijayalakshmi Srinivasan

IPC: G06F9/38

CPC classification number: G06F9/3867 ,  G06F9/3808 ,  G06F9/3832

Abstract: A processor and a method implemented by the processor to obtain computation results are described. The processor includes a unified reuse table embedded in a processor pipeline, the unified reuse table including a plurality of entries, each entry of the plurality of entries corresponding with a computation instruction or a set of computation instructions. The processor also includes a functional unit to perform a computation based on a corresponding instruction.

公开(公告)号：US09619385B2

公开(公告)日：2017-04-11

申请号：US14630680

申请日：2015-02-25

Applicant: International Business Machines Corporation

Inventor： James J. Bonanno ,  Alper Buyuktosunoglu ,  Brian W. Curran ,  Willm Hinrichs ,  Christian Jacobi ,  Brian R. Prasky ,  Martin Recktenwald ,  Anthony Saporito ,  Vijayalakshmi Srinivasan ,  John-David Wellman

IPC: G06F12/08 ,  G06F12/12 ,  G06F12/0831 ,  G06F12/0817 ,  G06F12/084 ,  G06F12/128

CPC classification number: G06F12/0831 ,  G06F9/3806 ,  G06F9/46 ,  G06F11/34 ,  G06F12/0824 ,  G06F12/0828 ,  G06F12/084 ,  G06F12/0842 ,  G06F12/123 ,  G06F12/128 ,  G06F2212/1024 ,  G06F2212/314 ,  G06F2212/601 ,  G06F2212/621 ,  G06F2212/622 ,  G06F2212/684

Abstract: Cache miss rates for threads operating in a simultaneous multi-threading computer processing environment can be estimated. The single thread rates can be estimated by monitoring a shared directory for cache misses for a first thread. Memory access requests can be routed to metering cache directories associated with the particular thread. Single thread misses to the shared directory and single thread misses to the associated metering cache directory are monitored and a performance indication is determined by comparing the cache misses with the thread misses. The directory in the associated metering cache is rotated, and a second sharing performance indication is determined.

公开(公告)号：US20160357676A1

公开(公告)日：2016-12-08

申请号：US14733168

申请日：2015-06-08

Applicant: International Business Machines Corporation

Inventor： Harold W. Cain, III ,  David M. Daly ,  Brian R. Prasky ,  Vijayalakshmi Srinivasan

IPC: G06F12/08

CPC classification number: G06F12/0862 ,  G06F9/48 ,  G06F9/4887 ,  G06F2212/602

Abstract: Embodiments relate to a prefetch threshold for cache restoration. An aspect includes determining, based on a task switch from an outgoing task to a current task in a processor, a prefetch threshold for a next task, the prefetch threshold corresponding to an expected runtime of the current task and an amount of time required to prefetch data for the next task. Another aspect includes starting prefetching for the next task while the current task is executing based on the prefetch threshold.

Abstract translation: 实施例涉及用于高速缓存恢复的预取阈值。 一方面包括基于从出局任务到处理器中的当前任务的任务切换来确定下一任务的预取阈值，对应于当前任务的预期运行时间的预取阈值以及预取所需的时间量 下一个任务的数据。 另一方面包括在当前任务基于预取阈值执行时启动下一个任务的预取。

公开(公告)号：US09448835B2

公开(公告)日：2016-09-20

申请号：US14528366

申请日：2014-10-30

Applicant: International Business Machines Corporation

Inventor： Harold W. Cain, III ,  David M. Daly ,  Brian R. Prasky ,  Vijayalakshmi Srinivasan

IPC: G06F12/08 ,  G06F9/46 ,  G06F9/50 ,  G06F9/48

CPC classification number: G06F9/5016 ,  G06F9/461 ,  G06F9/4843 ,  G06F12/0842 ,  G06F12/0862 ,  G06F12/0875 ,  G06F12/0891 ,  G06F12/0897 ,  G06F12/123 ,  G06F2212/1024 ,  G06F2212/251 ,  G06F2212/452 ,  G06F2212/602 ,  G06F2212/6022

Abstract: Embodiments relate to thread-based cache content savings for task switching in a computer processor. An aspect includes determining a cache entry in a cache of the computer processor that is owned by the first thread, wherein the determination is made based on a hardware thread identifier (ID) of the first thread matching a hardware thread ID in the cache entry. Another aspect includes determining whether the determined cache entry is eligible for prefetching. Yet another aspect includes, based on determining that the determined cache entry is eligible for prefetching, setting a marker in the cache entry to active.

公开(公告)号：US20160246716A1

公开(公告)日：2016-08-25

申请号：US14918780

申请日：2015-10-21

Applicant: International Business Machines Corporation

Inventor： James J. Bonanno ,  Alper Buyuktosunoglu ,  Brian W. Curran ,  Willm Hinrichs ,  Christian Jacobi ,  Brian R. Prasky ,  Martin Recktenwald ,  Anthony Saporito ,  Vijayalakshmi Srinivasan ,  John-David Wellman

IPC: G06F12/08

CPC classification number: G06F12/0831 ,  G06F9/3806 ,  G06F9/46 ,  G06F11/34 ,  G06F12/0824 ,  G06F12/0828 ,  G06F12/084 ,  G06F12/0842 ,  G06F12/123 ,  G06F12/128 ,  G06F2212/1024 ,  G06F2212/314 ,  G06F2212/601 ,  G06F2212/621 ,  G06F2212/622 ,  G06F2212/684

Abstract: Cache miss rates for threads operating in a simultaneous multi-threading computer processing environment can be estimated. The single thread rates can be estimated by monitoring a shared directory for cache misses for a first thread. Memory access requests can be routed to metering cache directories associated with the particular thread. Single thread misses to the shared directory and single thread misses to the associated metering cache directory are monitored and a performance indication is determined by comparing the cache misses with the thread misses. The directory in the associated metering cache is rotated, and a second sharing performance indication is determined.

Abstract translation: 可以估计在同时多线程计算机处理环境中运行的线程的高速缓存未命中率。 可以通过监视第一个线程的高速缓存未命中的共享目录来估计单线程速率。 内存访问请求可以路由到与特定线程相关联的计量缓存目录。 单线程未命中到共享目录，单线程未连接到相关联的计费高速缓存目录，并通过将高速缓存未命中与线程未命中进行比较来确定性能指示。 相关联的计费高速缓存中的目录被旋转，并且确定第二共享性能指示。

公开(公告)号：US20150206568A1

公开(公告)日：2015-07-23

申请号：US14320172

申请日：2014-06-30

Applicant: International Business Machines Corporation

Inventor： Pradip Bose ,  Alper Buyuktosunoglu ,  Xiaochen Guo ,  Hillery C. Hunter ,  Jude A. Rivers ,  Vijayalakshmi Srinivasan

IPC: G11C11/16

CPC classification number: G11C11/1675 ,  G11C7/04 ,  G11C11/1659 ,  G11C11/1693

Abstract: Systems and methods to manage memory on a spin transfer torque magnetoresistive random-access memory (STT-MRAM) are provided. A particular method may include determining a performance characteristic using relationship information that relates a bit error rate to at least one of a programming pulse width, a temperature, a history-based predictive performance parameter , a coding scheme, and a voltage level also associated with a memory. The performance characteristic is stored and used to manage a write operation associated with the memory.

Abstract translation: 提供了一种管理自旋转移磁阻随机存取存储器（STT-MRAM）存储器的系统和方法。 特定方法可以包括使用将误码率与编程脉冲宽度，温度，基于历史的预测性能参数，编码方案以及与 一个记忆 性能特征被存储并用于管理与存储器相关联的写入操作。

公开(公告)号：US20150206566A1

公开(公告)日：2015-07-23

申请号：US14159605

申请日：2014-01-21

Applicant: International Business Machines Corporation

Inventor： Pradip Bose ,  Alper Buyuktosunoglu ,  Xiaochen Guo ,  Hillery C. Hunter ,  Jude A. Rivers ,  Vijayalakshmi Srinivasan

IPC: G11C11/16

CPC classification number: G11C11/1675 ,  G11C7/04 ,  G11C11/1659 ,  G11C11/1693

Abstract: Systems and methods to manage memory on a spin transfer torque magnetoresistive random-access memory (STT-MRAM) are provided. A particular method may include determining a performance characteristic using relationship information that relates a bit error rate to at least one of a programming pulse width, a temperature, a history-based predictive performance parameter , a coding scheme, and a voltage level also associated with a memory. The performance characteristic is stored and used to manage a write operation associated with the memory.