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公开(公告)号:US20200334525A1
公开(公告)日:2020-10-22
申请号:US16388320
申请日:2019-04-18
摘要: Methods and systems for performing calculations with a neural network include determining a conductance drift coefficient for resistive processing unit (RPU) weights in a neural network. A correction factor is applied to neuron inputs in the neural network in accordance with the drift coefficient and a time that has elapsed since the RPU weights were programmed. A calculation is performed with the neural network. The correction factor compensates for conductance drift.
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2.
公开(公告)号:US20190036530A1
公开(公告)日:2019-01-31
申请号:US15842482
申请日:2017-12-14
发明人: Pradip Bose , Alper Buyuktosunoglu , Pierce I-Jen Chuang , Phillip John Restle , Christos Vezyrtzis
IPC分类号: H03K19/003 , H03K17/16
CPC分类号: H03K19/00361 , H03K17/162 , H03K19/00384
摘要: Techniques facilitating on-chip supply noise voltage reduction and/or mitigation using local detection loops in a processor core are provided. In one example, a computer-implemented method can comprise detecting, by a processor core, a voltage droop at a first area of the processor core. The computer-implemented method can also comprise transmitting, by the processor core, voltage droop information to a local controller located in the first area and to a global controller located in the processor core. Further, the computer-implemented method can comprise applying, by the processor core, a first mitigation countermeasure at the first area of the processor core in response to a local instruction received from the local controller. The local instruction can comprise an indication of the first mitigation countermeasure.
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公开(公告)号:US20180046597A1
公开(公告)日:2018-02-15
申请号:US15232177
申请日:2016-08-09
发明人: Chia-Yu Chen , Pierce I-Jen Chuang , Li-Wen Hung , Jui-Hsin Lai
CPC分类号: G06F15/7892 , G06F7/58 , G06N3/063 , G06N3/082
摘要: A random number signal generator used for performing dropout or weight initialization for a node in a neural network. The random number signal generator includes a transistor which generates a random noise signal. The transistor includes a substrate, source and drain regions formed in the substrate, a first insulating layer formed over a channel of the transistor, a first trapping layer formed over the first insulating layer, a second insulating layer formed over the first trapping layer, and a second trapping layer formed over the second insulating layer. One or more traps in the first and second trapping layers are configured to capture or release one or more carriers flowing through the channel region. The random noise signal is generated as a function of one or more carrier being captured or released by the one or more traps.
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公开(公告)号:US11036276B2
公开(公告)日:2021-06-15
申请号:US16540692
申请日:2019-08-14
IPC分类号: G06F1/00 , G06F1/324 , G06F1/3296 , G06F1/30
摘要: A voltage droop mitigation system, that includes a first processor core that executes computer executable components stored in a memory. A time-based sensor component generates digital data representing voltage values associated with a power supply. A filtering component digitally conditions the generated digital data, and an analysis component analyzes the conditioned data and determines slope of the power supply voltage and employs counters to determine rate of data change over time; and if the slope is negative and exceeds a first pre-determined value for a pre-determined time period. The system implements one or more voltage droop-reduction techniques at the first processor core; and the first processor core transmits at least one of the following types of information: its voltage value, slope information or decision to apply droop reduction to one or more other cores.
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公开(公告)号:US20200226459A1
公开(公告)日:2020-07-16
申请号:US16245463
申请日:2019-01-11
发明人: Chia-Yu Chen , Pin-Yu Chen , Pierce I-Jen Chuang , Richard Chen , Jungwook Choi , Kailash Gopalakrishnan
摘要: A processor receives input data and provides the input data to a first neural network including a first neural network model. The first neural network model has a first numerical precision level. A first feature vector is generated from the input data using the first neural network. The input data is provided to a second neural network including a second neural network model. The second neural network model has a second numerical precision level different from the first numerical precession level. A second feature vector is generated from the input data using the second neural network. A difference metric is computed between the first feature vector and the second feature vector. The difference metric is indicative of whether the input data includes adversarial data.
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6.
公开(公告)号:US10171081B1
公开(公告)日:2019-01-01
申请号:US15663033
申请日:2017-07-28
发明人: Pradip Bose , Alper Buyuktosunoglu , Pierce I-Jen Chuang , Phillip John Restle , Christos Vezyrtzis
IPC分类号: H03K17/16 , H03K19/003
摘要: Techniques facilitating on-chip supply noise voltage reduction and/or mitigation using local detection loops in a processor core are provided. In one example, a computer-implemented method can comprise detecting, by a processor core, a voltage droop at a first area of the processor core. The computer-implemented method can also comprise transmitting, by the processor core, voltage droop information to a local controller located in the first area and to a global controller located in the processor core. Further, the computer-implemented method can comprise applying, by the processor core, a first mitigation countermeasure at the first area of the processor core in response to a local instruction received from the local controller. The local instruction can comprise an indication of the first mitigation countermeasure.
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公开(公告)号:US09886640B1
公开(公告)日:2018-02-06
申请号:US15230934
申请日:2016-08-08
发明人: Chia-Yu Chen , Pierce I-Jen Chuang , Li-Wen Hung , Jui-Hsin Lai
CPC分类号: G06K9/00906 , G06F21/32 , G06K9/00255 , G06K9/00288 , G06K9/2018
摘要: A method, system and computer program product are disclosed that comprise capturing first image data of a person's face using at least one sensor responsive in a band of infrared wavelengths and capturing second image data of the person's face using the at least one sensor responsive in a band of visible wavelengths; extracting image features in the image data and detecting face regions; applying a similarity analysis to image feature edge maps extracted from the first and the second image data; and recognizing a presence of a live face image after regions found in the first image data pass a facial features classifier. Upon recognizing the presence of the live face image, additional operations can include verifying the identity of the person as an authorized person and granting the person access to a resource.
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公开(公告)号:US11561595B2
公开(公告)日:2023-01-24
申请号:US17359153
申请日:2021-06-25
发明人: Pradip Bose , Alper Buyuktosunoglu , Pierce I-Jen Chuang , Phillip John Restle , Christos Vezyrtzis
IPC分类号: G06F1/32 , G06F1/3206 , G06F1/28 , G06F1/30
摘要: Techniques facilitating voltage management via on-chip sensors are provided. In one example, a computer-implemented method can comprise measuring, by a first processor core, power supply information. The computer-implemented method can also comprise measuring, by the first processor core, a value of an electrical current generated by the first processor core. Further, the computer-implemented method can comprise applying, by the first processor core, a mitigation technique at the first processor core in response to a determination that a combination of the power supply noise information and the value of the electrical current indicates a presence of a voltage noise at the first processor core.
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公开(公告)号:US11461640B2
公开(公告)日:2022-10-04
申请号:US16388320
申请日:2019-04-18
摘要: Methods and systems for performing calculations with a neural network include determining a conductance drift coefficient for resistive processing unit (RPU) weights in a neural network. A correction factor is applied to neuron inputs in the neural network in accordance with the drift coefficient and a time that has elapsed since the RPU weights were programmed. A calculation is performed with the neural network. The correction factor compensates for conductance drift.
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公开(公告)号:US10886415B2
公开(公告)日:2021-01-05
申请号:US16295750
申请日:2019-03-07
发明人: Ko-Tao Lee , Pierce I-Jen Chuang , Cheng-Wei Cheng , Seyoung Kim
IPC分类号: H01L29/786 , H01L29/66 , H01L29/78 , H01L29/423 , H01L29/10 , H01L29/06
摘要: A method of forming a multi-state nanosheet transistor device is provided. The method includes forming an alternating sequence of sacrificial layer segments and differentially doped nanosheet layer segments on a substrate, wherein each of the differentially doped nanosheet layer segments has a different dopant concentration from the other differentially doped nanosheet layer segments. The method further includes forming a source/drain on each of opposite ends of the sacrificial layer segments and differentially doped nanosheet layer segments, and removing the sacrificial layer segments. The method further includes depositing a gate dielectric layer on the differentially doped nanosheet layer segments, and forming a gate electrode on the gate dielectric layer to form a common gate-all-around structure, where each of the differentially doped nanosheet layer segments conducts current at a different threshold voltage.
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