BACK-SIDE WAFER MODIFICATION
    61.
    发明申请

    公开(公告)号:US20220148927A1

    公开(公告)日:2022-05-12

    申请号:US17095931

    申请日:2020-11-12

    Abstract: A method can include obtaining characteristic data for a wafer. The characteristic data can correspond to the wafer in a processed state and can include a set of stress values of the wafer. The wafer can include a front side, a back side opposite the front side, and a set of regions. The set of stress values can include a first stress value corresponding to a first region. In the processed state, one or more front-side processes can be completed on the front side of the wafer. The method can include determining that the first stress value exceeds a stress threshold and generating a compensation map. The compensation map can identify one or more regions for forming one or more trenches. The method can include initiating, based on the compensation map, a formation of a first trench on the back side of the wafer in the first region.

    ENSURING IoT DEVICE FUNCTIONALITY IN THE PRESENCE OF MULTIPLE TEMPERATURE DEPENDENCIES

    公开(公告)号:US20210080982A1

    公开(公告)日:2021-03-18

    申请号:US16573347

    申请日:2019-09-17

    Abstract: A system, method and computer program product for operating a low-voltage Internet-of-Things sensor device. The method includes sensing of the temperature dependence at each voltage condition in addition to the actual temperature and voltage. A programmed machine learning model uses the information to decide when it is appropriate to test the device functionality and use the results of different tests to determine when the system should run synchronously or asynchronously through a machine learning predictive algorithm. Based on said one or more sensed operating conditions, the system uses the model to detect a mode of operation of said IoT device indicating IoT device meets an expected level of performance, or a mode indicating said IoT device is not operating according to the expected level of performance. Based on the detected operating condition, the IoT device automatically adapts its operation to ensure a desired level of IoT sensor device performance.

    Fin-based fill cell optimization
    63.
    发明授权

    公开(公告)号:US10885260B1

    公开(公告)日:2021-01-05

    申请号:US16559981

    申请日:2019-09-04

    Abstract: Methods, systems and computer program products for providing fin-based fill cell optimization are provided. Aspects include receiving a semiconductor layout comprising at least a first logic cell, a second logic cell, and a fill cell. A left boundary of the fill cell is adjacent to the first logic cell and a right boundary of the fill cell is adjacent to the second logic cell. Aspects also include determining a number of active left fins, right fins, and active fill cell fins associated with FinFET structures of the first logic cell, second logic cell and fill cell, respectively. Aspects also include comparing the number of active fins to a set of fin rules. Responsive to determining that the semiconductor layout violates the set of fin rules, aspects include modifying the semiconductor layout to change the number of active fill cell fins to satisfy the set of fin rules.

    Hierarchical trim management for self-aligned double patterning

    公开(公告)号:US10586009B2

    公开(公告)日:2020-03-10

    申请号:US15838520

    申请日:2017-12-12

    Abstract: Embodiments of the invention are directed to methods, systems, and computer program products for the hierarchical management of self-aligned double patterning (SADP) trim shapes. Non-limiting embodiments of the invention include receiving, by a processor, one or more virtual trim shapes at a boundary between a parent hierarchy block and a child hierarchy block. The trim shapes are aligned to a legal trim grid. The processor then places one or more trim shapes aligned with the legal trim grid.

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