Abstract:
An array substrate and a display apparatus including the array substrate are provided. The array substrate includes a substrate divided into a display area and a peripheral area adjacent to the display area. A pixel array is formed on the substrate corresponding to the display area and receives a driving signal. A driving circuit includes a plurality of stages and is formed on the substrate corresponding to the peripheral area. Each of the stages includes a first transistor having a source electrode connected to an output terminal to output the driving signal, a channel layer formed between a gate insulating layer and the source electrode, the channel layer having an opening to facilitate contact between a portion of the gate insulating layer and the source electrode, and a capacitor defined by a gate electrode of the first transistor, the source electrode, and the gate insulating layer contacting the source electrode.
Abstract:
A clock generating circuit and a display device having the same are provided. An exemplary clock generating circuit includes a first voltage generating part, a second voltage generating part and an intermediate voltage generating part. The first voltage generating part generates a first voltage during a high level period. The second voltage generating part generates a second voltage that is lower than the first voltage during a low level period. The intermediate voltage generating part generates an intermediate voltage that is higher than the second voltage and lower than the first voltage during a first transition period when the second voltage is changed to the first voltage and a second transition period when the first voltage is changed to the second voltage.
Abstract:
A driver chip for controlling a high-resolution display panel is presented. The driver chip is not much larger than a conventional driver chip that is currently used for lower resolution display panels. The driver chip applies data signals to the data lines of the display panel and gate control signals to a gate driver that is formed in the peripheral region of the display panel. The gate driver, which may be made of amorphous silicon TFTs, generates gate signals in response to the gate control signals from the driver chip and applies the gate signals to gate lines. Since the driver chip of the invention controls more gate lines and data lines than a conventional chip of about the same size, the driver chip may be easily adapted for display devices having multiple panels. Where multiple panels are used, the panels may be scanned simultaneously or sequentially.
Abstract:
A driver chip for controlling a high-resolution display panel is presented. The driver chip is not much larger than a conventional driver chip that is currently used for lower resolution display panels. The driver chip applies data signals to the data lines of the display panel and gate control signals to a gate driver that is formed in the peripheral region of the display panel. The gate driver, which may be made of amorphous silicon TFTs, generates gate signals in response to the gate control signals from the driver chip and applies the gate signals to gate lines. Since the driver chip of the invention controls more gate lines and data lines than a conventional chip of about the same size, the driver chip may be easily adapted for display devices having multiple panels. Where multiple panels are used, the panels may be scanned simultaneously or sequentially.
Abstract:
A display panel including a first capacitor and a second capacitor is disclosed. The first and second capacitors boost a second driving voltage from a driving chip and apply the boosted second driving voltage to the driving chip. The driving chip receives the boosted second driving voltage and outputs a first driving voltage to drive the display panel. Thus, the display panel does not require any additional capacitor for boosting the second driving voltage, thereby reducing a thickness and a manufacturing cost of the display panel.
Abstract:
A display panel includes an array substrate and an opposite substrate. The array substrate includes pixels, first signal lines, and second signal lines. The opposite substrate is combined with the array substrate, interposing a liquid crystal layer there between. The opposite substrate includes an opposite base substrate and first and second protruded electrodes. The first and second protruded electrodes are formed in regions corresponding to the first and second signal lines, respectively, and are electrically connected to the first and second signal lines, respectively, based on an externally provided pressure. Therefore, a thickness of the display panel is decreased, and a touch position is easily detected.
Abstract:
A liquid crystal display apparatus including a gate driving circuit disposed on a liquid crystal display is provided. The apparatus further includes a data driving chip, disposed on the liquid crystal display panel, to apply data driving signals to data lines. The gate driving circuit includes a plurality of stages connected to one another in parallel. The odd-numbered stages of the stages each apply gate driving signals to odd-numbered gate lines of the gate lines, in response to a first clock signal and the even-numbered stages of the stages each apply the gate driving signals to even-numbered gate lines of the gate lines, in response to a second clock signal having an opposite phase from a phase of the first clock signal.
Abstract:
In one embodiment, a display device includes a plurality of gate lines transmitting normal gate signals, a plurality of data lines crossing the gate lines and transmitting data voltages, and a plurality of storage electrode lines extending in parallel to the gate lines and transmitting storage signals. The display device may further include a plurality of pixels arranging in a matrix, each pixel having a switching element connected to the gate line and the data line, a liquid crystal capacitor connected to the switching element and a common voltage, and a storage capacitor connected to the switching element and the storage electrode line. The display device may further include a plurality of pseudo gate driving circuits generating pseudo gate signals based on the normal gate signals, and a plurality of storage signal generating circuits generating the storage signals based on the pseudo gate signals.
Abstract:
A liquid crystal display (LCD) apparatus and a method of manufacturing the same include a seal line having two protrusions, one of the protrusions having a liquid crystal (LC) injection hole. Moreover, the LCD apparatus having the seal line constitutes a closed loop. The display apparatus and the manufacturing method thereof increase production yields because the number of apparatus substrates for the display apparatus obtained from a mother substrate is increased by minimizing a distance between two adjacent apparatus substrates on the mother substrate. The method of manufacturing an exemplary LCD apparatus includes a one drop filling method or a vacuum injection method.
Abstract:
A liquid crystal display (LCD) includes a substrate, gate lines, data lines, thin film transistors and pixel electrodes. The gate lines are formed on the substrate and cross the data lines. The thin film transistors are connected to the gate and data lines, and each thin film transistor includes a drain electrode. The pixel electrodes are connected to the thin film transistors and are arranged in a matrix, and each of the pixel electrodes has a first side disposed in parallel with the gate lines and a second side adjacent to the first side and shorter than the first side. In the LCD, the predetermined portion of each of the drain electrodes is overlapped with only one of two adjacent pixel electrodes if the polarities of the adjacent pixel electrodes are different, and the predetermined portion of each of the drain electrodes is overlapped with both of the adjacent pixel electrodes if the polarities are the same.