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    PACKAGE WITH INTEGRATED MAGNETS FOR ELECTROMAGNETICALLY-ACTUATED PROBE-STORAGE DEVICE
    61.
    发明申请
    PACKAGE WITH INTEGRATED MAGNETS FOR ELECTROMAGNETICALLY-ACTUATED PROBE-STORAGE DEVICE 审中-公开
    具有用于电磁致动探针存储装置的集成磁体的封装

    公开(公告)号：US20100039729A1

    公开(公告)日：2010-02-18

    申请号：US12192009

    申请日：2008-08-14

    申请人： John Heck ,  Nickolai Belov ,  Steve Greathouse

    发明人： John Heck ,  Nickolai Belov ,  Steve Greathouse

    IPC分类号： G11B5/127

    CPC分类号： G11B9/1454 ,  G11B9/02

    摘要： A packaged memory device for storing information comprises a stack, a package lid, a first magnet structure fixedly connected to the package lid, a package body and a second magnet structure connected with the package body. The stack includes a tip substrate, a cap, and a media arranged between the tip substrate and cap and movable relative to the tip substrate. The tip substrate includes a plurality of tips extending from the tip substrate so that the tips can access the media. The first magnet structure includes a first magnet connected with a first flux plate. The second magnet structure includes a second magnet connected with a second flux plate. The second flux plate is integrated with the package body so that the second flux plate provides structural rigidity to the package body. The stack is connected to one or both of the package body and the second magnet.

    摘要翻译： 用于存储信息的封装存储器件包括堆叠，封装盖，固定地连接到封装盖的第一磁体结构，封装体和与封装体连接的第二磁体结构。 该堆叠包括尖端基底，帽和布置在尖端基底和帽之间并可相对于尖端基底移动的介质。 尖端基底包括从顶端基底延伸的多个尖端，使得尖端可以接近介质。 第一磁体结构包括与第一磁通板连接的第一磁体。 第二磁体结构包括与第二磁通板连接的第二磁体。 第二磁通板与封装体一体化，使得第二磁通板向封装体提供结构刚性。 该堆叠件连接到包装体和第二磁体中的一个或两个。

    METHOD OF INTEGRATING MEMS STRUCTURES AND CMOS STRUCTURES USING OXIDE FUSION BONDING
    63.
    发明申请
    METHOD OF INTEGRATING MEMS STRUCTURES AND CMOS STRUCTURES USING OXIDE FUSION BONDING 审中-公开
    使用氧化物熔融粘合来集成MEMS结构和CMOS结构的方法

    公开(公告)号：US20080233672A1

    公开(公告)日：2008-09-25

    申请号：US11688808

    申请日：2007-03-20

    申请人： John Heck

    发明人： John Heck

    IPC分类号： H01L21/00

    CPC分类号： G11B9/1436

    摘要： A method to fabricate a device including a micro-electro-mechanical system structure and a monolithic integrated circuit comprises using a first wafer as a first substrate, fabricating the micro-electro-mechanical system structure on the first substrate, and forming a first oxide layer over the micro-electro-mechanical system structure. The method further comprises using a second wafer as a second substrate, fabricating the monolithic integrated circuit on the second substrate, and forming a second oxide layer over the monolithic integrated circuit. The first wafer and the second wafer are arranged so that the first oxide layer opposes the second oxide layer. The micro-electro-mechanical system structure is aligned with the monolithic integrated circuit, the first oxide layer is contacted with the second oxide layer; and bonded with the second oxide layer.

    摘要翻译： 制造包括微机电系统结构和单片集成电路的器件的方法包括：使用第一晶片作为第一衬底，在第一衬底上制造微电子机械系统结构，并形成第一氧化物层 超微机电系统结构。 该方法还包括使用第二晶片作为第二衬底，在第二衬底上制造单片集成电路，并在单片集成电路上形成第二氧化物层。 第一晶片和第二晶片被布置成使得第一氧化物层与第二氧化物层相对。 微电子机械系统结构与单片集成电路对准，第一氧化物层与第二氧化物层接触; 并与第二氧化物层结合。

    Seek-scan probe (SSP) memory with sharp probe tips formed at CMOS-compatible temperatures
    64.
    发明申请
    Seek-scan probe (SSP) memory with sharp probe tips formed at CMOS-compatible temperatures 有权
    寻找扫描探针（SSP）存储器，在CMOS兼容温度下形成尖锐的探针尖

    公开(公告)号：US20080229577A1

    公开(公告)日：2008-09-25

    申请号：US11725647

    申请日：2007-03-19

    申请人： John Heck

    发明人： John Heck

    IPC分类号： G01R1/06 ,  H01R43/00

    CPC分类号： G11B9/1409 ,  G01Q80/00 ,  Y10T29/49147 ,  Y10T29/49222

    摘要： Embodiments of a process comprising forming one or more micro-electro-mechanical (MEMS) probe on a conductive metal oxide semiconductor (CMOS) wafer, wherein each MEMS probe comprises a cantilever beam with a fixed end and a free end and wherein the CMOS wafer has circuitry thereon; forming an unsharpened tip at or near the free end of each cantilever beam; depositing a silicide-forming material over the tip; annealing the wafer to sharpen the tip; and exposing the sharpened tip. Embodiments of an apparatus comprising a conductive metal oxide semiconductor (CMOS) wafer including circuitry therein; one or more micro-electro-mechanical (MEMS) probes integrally formed on the CMOS wafer, wherein each MEMS probe comprises a cantilever beam with a fixed end and a free end and a sharpened tip at or near the free end, the sharpened tip formed by a process comprising forming an unsharpened tip at or near the free end of each cantilever beam, depositing a silicide-forming material over the unsharpened tip, annealing the wafer to sharpen the unsharpened tip, and exposing the sharpened tip.

    摘要翻译： 一种方法的实施例包括在导电金属氧化物半导体（CMOS）晶片上形成一个或多个微电机械（MEMS）探针，其中每个MEMS探针包括具有固定端和自由端的悬臂梁，并且其中所述CMOS晶片 在其上有电路; 在每个悬臂梁的自由端处或附近形成未钝化的尖端; 在尖端上沉积硅化物形成材料; 退火晶片以锐化尖端; 并暴露锋利的尖端。 包括其中包括电路的导电金属氧化物半导体（CMOS）晶片的装置的实施例; 在CMOS晶片上整体形成的一个或多个微机电（MEMS）探针，其中每个MEMS探针包括具有固定端和自由端的悬臂梁，以及在自由端处或附近的尖锐尖端，形成尖锐的尖端 通过包括在每个悬臂梁的自由端处或附近形成未钝化的尖端的方法，在未钝化的尖端上沉积硅化物形成材料，退火晶片以锐化未钝化的尖端，以及暴露尖锐的尖端。

    Electrically-isolated interconnects and seal rings in packages using a solder preform
    68.
    发明授权
    Electrically-isolated interconnects and seal rings in packages using a solder preform 有权
    使用焊料预制件的封装中的电隔离互连和密封环

    公开(公告)号：US07243833B2

    公开(公告)日：2007-07-17

    申请号：US11174409

    申请日：2005-06-30

    申请人： Leonel R. Arana ,  John Heck

    发明人： Leonel R. Arana ,  John Heck

    IPC分类号： B23K35/12 ,  B23K31/02

    CPC分类号： B23K3/0623 ,  B23K2101/38 ,  H01L2224/17

    摘要： Embodiments include electronic assemblies and methods for forming electronic assemblies. One embodiment includes a method of forming a MEMS device assembly, including forming an active MEMS region on a substrate. A plurality of bonding pads electrically coupled to the active MEMS region are formed. A seal ring wetting layer is also formed on the substrate, the seal ring wetting layer surrounding the active MEMS region. A single piece solder preform is positioned on the bonding pads and on the seal ring wetting layer, the single piece solder preform including a seal ring region and a bonding pad region. The seal ring region is connected to the bonding pad region by a plurality of solder bridges. The method also includes heating the single piece solder preform to a temperature above the reflow temperature, so that the bridges split and the solder from the preform accumulates on the seal ring wetting layer and the bonding pads. A lid is coupled to the solder. In certain embodiments the lid may include vias having conductive material therein for providing electrical contact to the MEMS device.

    摘要翻译： 实施例包括用于形成电子组件的电子组件和方法。 一个实施例包括形成MEMS器件组件的方法，包括在衬底上形成有源MEMS区域。 形成电耦合到有源MEMS区域的多个接合焊盘。 密封环润湿层也形成在衬底上，围绕有源MEMS区域的密封环润湿层。 单块焊料预制件位于接合焊盘和密封环润湿层上，单件焊料预制件包括密封环区域和焊盘区域。 密封圈区域通过多个焊接桥连接到焊盘区域。 该方法还包括将单件焊料预制件加热到高于回流温度的温度，使得桥接器分裂，并且来自预制件的焊料积聚在密封环润湿层和接合焊盘上。 盖子与焊料相连。 在某些实施例中，盖可以包括其中具有导电材料的通孔，用于提供与MEMS器件的电接触。

    Ultra-low voltage capable zipper switch
    69.
    发明申请
    Ultra-low voltage capable zipper switch 失效
    超低电压拉链开关

    公开(公告)号：US20060290443A1

    公开(公告)日：2006-12-28

    申请号：US11165795

    申请日：2005-06-23

    申请人： Tsung-Kuan Chou ,  Hanan Bar ,  Quan Tran ,  Joseph Melki ,  John Heck ,  Qing Ma

    发明人： Tsung-Kuan Chou ,  Hanan Bar ,  Quan Tran ,  Joseph Melki ,  John Heck ,  Qing Ma

    IPC分类号： H01P1/10

    CPC分类号： H01H59/0009 ,  B81B3/0013 ,  B81B2201/014 ,  H01H2059/0063 ,  H01H2059/0072

    摘要： An electromechanical switch includes an actuation electrode, an anchor, a cantilever electrode, a contact, and signal lines. The actuation electrode and anchor are mounted to a substrate. The cantilever electrode is supported by the anchor above the actuation electrode. The contact is mounted to the cantilever electrode. The signal lines are positioned to form a closed circuit with the contact when an actuation voltage is applied between the actuation electrode and the cantilever electrode causing the cantilever electrode to bend towards the actuation electrode in a zipper like movement starting from a distal end of the cantilever electrode.

    摘要翻译： 机电开关包括致动电极，锚，悬臂电极，触点和信号线。 致动电极和锚固件安装到基板上。 悬臂电极由致动电极上方的锚固件支撑。 触点安装到悬臂电极。 当在致动电极和悬臂电极之间施加致动电压时，信号线被定位成与触点形成闭合电路，导致悬臂电极以拉链的方式朝着致动电极弯曲，从悬臂的远端开始 电极。