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    Nonvolatile memory devices and methods of forming the same
    64.
    发明申请
    Nonvolatile memory devices and methods of forming the same 失效
    非易失存储器件及其形成方法

    公开(公告)号：US20080096328A1

    公开(公告)日：2008-04-24

    申请号：US11646217

    申请日：2006-12-27

    申请人： Jung-Dal Chol ,  Jong-Sun Sel ,  Chang-Seok Kang

    发明人： Jung-Dal Chol ,  Jong-Sun Sel ,  Chang-Seok Kang

    IPC分类号： H01L21/8232

    CPC分类号： H01L21/823462 ,  H01L21/823456 ,  H01L21/823475 ,  H01L27/105 ,  H01L27/11526 ,  H01L27/11529 ,  H01L27/11546 ,  Y10S257/903

    摘要： A memory device includes a substrate having a cell region, a low voltage region and a high voltage region. A ground selection transistor, a string selection transistor and a cell transistor are in the cell region, a low voltage transistor is in the low voltage region, and a high voltage transistor is in the high voltage region. A common source contact is on the ground selection transistor and a low voltage contact is on the low voltage transistor. A bit line contact is on the string selection transistor, a high voltage contact is on the high voltage transistor, and a bit line is on the bit line contact. A first insulating layer is on the substrate, and a second insulating layer is on the first insulating layer. The common source contact and the first low voltage contact extend to a height of the first insulating layer, and the bit line contact and the first high voltage contact extend to a height of the second insulating layer.

    摘要翻译： 存储器件包括具有单元区域，低电压区域和高电压区域的衬底。 接地选择晶体管，串选择晶体管和单元晶体管在单元区域中，低电压晶体管处于低电压区域，高压晶体管处于高电压区域。 公共源触点位于接地选择晶体管上，低压触点位于低压晶体管上。 串行选择晶体管上有一个位线接点，高电压晶体管上有高压触点，位线接触位线。 第一绝缘层在基板上，第二绝缘层位于第一绝缘层上。 共源极接触和第一低电压接触延伸到第一绝缘层的高度，并且位线接触和第一高电压接触延伸到第二绝缘层的高度。

    Non-Volatile Memory Device and Method of Fabricating the Same
    65.
    发明申请
    Non-Volatile Memory Device and Method of Fabricating the Same 有权
    非易失性存储器件及其制造方法

    公开(公告)号：US20070272971A1

    公开(公告)日：2007-11-29

    申请号：US11734659

    申请日：2007-04-12

    申请人： Chang-Hyun Lee ,  Tea-Kwang Yu ,  Jong-Sun Sel ,  Ju-Hyung Kim ,  Byeong-In Choe

    发明人： Chang-Hyun Lee ,  Tea-Kwang Yu ,  Jong-Sun Sel ,  Ju-Hyung Kim ,  Byeong-In Choe

    IPC分类号： H01L29/788

    CPC分类号： H01L27/11568 ,  H01L27/105 ,  H01L27/11526 ,  H01L27/11541

    摘要： In the non-volatile memory device, a first isolation layer is formed to have a plurality of depressions each having a predetermined depth from an upper surface of the semiconductor substrate. A fin type first active region is defined by the first isolation layer and has one or more inflected portions at its sidewalls exposed from the first isolation layer, where the first active region is divided into an upper part and a lower part by the inflected portions and a width of the upper part is narrower than that of the lower part. A tunneling insulation layer is formed on the first active region. A storage node layer is formed on the tunneling insulation layer. Also, a blocking insulation layer is formed on the storage node layer, and a control gate electrode is formed on the blocking insulation layer.

    摘要翻译： 在非易失性存储器件中，第一隔离层形成为具有从半导体衬底的上表面具有预定深度的多个凹部。 翅片型第一有源区由第一隔离层限定，并且在其侧壁处具有从第一隔离层露出的一个或多个弯曲部分，其中第一有源区被折弯部分分成上部和下部， 上部的宽度比下部的宽度窄。 隧道绝缘层形成在第一有源区上。 在隧道绝缘层上形成存储节点层。 此外，在存储节点层上形成隔离绝缘层，并且在阻挡绝缘层上形成控制栅电极。

    Non-volatile memory device and method of fabricating the same
    66.
    发明授权
    Non-volatile memory device and method of fabricating the same 有权
    非易失性存储器件及其制造方法

    公开(公告)号：US07812375B2

    公开(公告)日：2010-10-12

    申请号：US11734659

    申请日：2007-04-12

    申请人： Chang-Hyun Lee ,  Tea-Kwang Yu ,  Jong-Sun Sel ,  Ju-Hyung Kim ,  Byeong-In Choe

    发明人： Chang-Hyun Lee ,  Tea-Kwang Yu ,  Jong-Sun Sel ,  Ju-Hyung Kim ,  Byeong-In Choe

    IPC分类号： H01L31/112 ,  H01L21/336

    CPC分类号： H01L27/11568 ,  H01L27/105 ,  H01L27/11526 ,  H01L27/11541

    摘要： In the non-volatile memory device, a first isolation layer is formed to have a plurality of depressions each having a predetermined depth from an upper surface of the semiconductor substrate. A fin type first active region is defined by the first isolation layer and has one or more inflected portions at its sidewalls exposed from the first isolation layer, where the first active region is divided into an upper part and a lower part by the inflected portions and a width of the upper part is narrower than that of the lower part. A tunneling insulation layer is formed on the first active region. A storage node layer is formed on the tunneling insulation layer. Also, a blocking insulation layer is formed on the storage node layer, and a control gate electrode is formed on the blocking insulation layer.

    摘要翻译： 在非易失性存储器件中，第一隔离层形成为具有从半导体衬底的上表面具有预定深度的多个凹部。 翅片型第一有源区由第一隔离层限定，并且在其侧壁处具有从第一隔离层露出的一个或多个弯曲部分，其中第一有源区被折弯部分分成上部和下部， 上部的宽度比下部的宽度窄。 隧道绝缘层形成在第一有源区上。 在隧道绝缘层上形成存储节点层。 此外，在存储节点层上形成隔离绝缘层，并且在阻挡绝缘层上形成控制栅电极。