公开(公告)号：US07769623B2

公开(公告)日：2010-08-03

申请号：US10321017

申请日：2002-12-17

Applicant: Parul A Mittal ,  Vivek Jain ,  Natwar Modani ,  Ravi Kothari ,  Aseem Agrawal

Inventor： Parul A Mittal ,  Vivek Jain ,  Natwar Modani ,  Ravi Kothari ,  Aseem Agrawal

IPC: G06F17/60

CPC classification number: G06Q30/02 ,  G06Q30/0201 ,  G06Q30/0203 ,  G06Q30/0204 ,  G06Q30/0219

Abstract: The invention describes a method and system for conducting online marketing research keeping in consideration the specified budget for the experiment. The invention describes a methodology for effective data collection and optimised utilization of budget through the use of efficient sampling and grouping of users.

Abstract translation: 本发明描述了考虑到实验的具体预算进行在线营销研究的方法和系统。 本发明描述了通过使用有效的采样和用户分组来有效地数据收集和优化利用预算的方法。

公开(公告)号：US20050096997A1

公开(公告)日：2005-05-05

申请号：US10699173

申请日：2003-10-31

Applicant: Vivek Jain ,  Ravi Kothari

Inventor： Vivek Jain ,  Ravi Kothari

IPC: G06Q30/00 ,  G06F17/60

CPC classification number: G06Q30/02 ,  G06Q30/0601

Abstract: Within an online shopping environment, a hosting server supports shoppers and merchants from whom the shoppers purchase goods or services. The hosting server enables an individual user to shop or browse the merchant sites and also enables a group of users to coordinate their shopping or browsing activities. A set of profiling tools build separate profiles based on individual and group shopper activity, as well as the interaction of an individual shopper with one or more groups of shoppers. A targeting tool uses the shopper profiles and information regarding previous promotions (if any) from a promotions library to make recommendations to individual shoppers and shopper groups based also on parameters specified by the merchant/s. The recommendations are directed to shoppers, in accordance with algorithms stored in a repository.

Abstract translation: 在网络购物环境中，托管服务器支持购物者和购物者从中购买商品或服务的商家。 托管服务器使得个人用户能够购物或浏览商家站点，并且还使一组用户能够协调其购物或浏览活动。 一组分析工具基于个人和团体购物者活动以及个人购物者与一组或多组购物者的互动构建单独的配置文件。 目标工具使用购物者资料和关于促销图书馆以前促销（如果有的话）的信息，还可以根据商家指定的参数向个人购物者和购物者组提出建议。 根据存储在存储库中的算法，这些建议针对购物者。

公开(公告)号：US5496774A

公开(公告)日：1996-03-05

申请号：US363062

申请日：1994-12-21

Applicant: Dipankar Pramanik ,  Vivek Jain ,  Milind G. Weling

Inventor： Dipankar Pramanik ,  Vivek Jain ,  Milind G. Weling

IPC: H01L21/768 ,  H01L21/44

CPC classification number: H01L21/76819

Abstract: An integrated circuit fabrication method begins with semiconductor devices formed on a substrate. A patterned metal layer is deposited on the substrate to connect the semiconductor devices. A nitride layer is deposited over the metal layer and substrate. The nitride layer topography comprises hills located over metal regions and valleys located over non-metal regions. Spin-on-glass (SOG) is deposited over the nitride layer, thereby filling the valleys and covering the hills. The SOG layer and the nitride layer hills are etched back at substantially the same etch rate, using plasma etching, to form a planar surface. An oxide layer is then deposited over the planar surface to encapsulate the semiconductor devices, metal layer, nitride layer and SOG layer. Vias may then be etched through the oxide layer and the nitride layer to expose portions of the underlying metal layer and facilitate upper layer metal connections thereto. A second metal layer is deposited on the oxide layer and the fabrication process continues until the integrated circuit is complete.

公开(公告)号：US5374833A

公开(公告)日：1994-12-20

申请号：US775085

申请日：1991-10-11

Applicant: Subhash R. Nariani ,  Vivek Jain ,  Dipankar Pramanik ,  Kuang-Yeh Chang

Inventor： Subhash R. Nariani ,  Vivek Jain ,  Dipankar Pramanik ,  Kuang-Yeh Chang

IPC: H01L21/76 ,  H01L21/314 ,  H01L21/316 ,  H01L23/29 ,  H01L23/532 ,  H01L27/115 ,  H02L45/00

CPC classification number: H01L23/291 ,  H01L21/314 ,  H01L23/298 ,  H01L23/5329 ,  H01L27/115 ,  H01L2924/0002 ,  Y10S438/91 ,  Y10S438/958

Abstract: The invention relates to an integrated circuit including one or more amorphous silicon layers for neutralizing charges which occur in various dielectric layers during fabrication. The amorphous silicon layers include dangling silicon bonds which neutralize charges which would otherwise cause isolation breakdown, impair integrated circuit performance and increase manufacturing costs.

Abstract translation: 本发明涉及一种集成电路，其包括用于中和在制造期间在各种介电层中发生的电荷的一个或多个非晶硅层。 非晶硅层包括悬挂硅键，其中和电荷，否则将导致隔离击穿，损害集成电路性能并增加制造成本。

公开(公告)号：US5328865A

公开(公告)日：1994-07-12

申请号：US11084

申请日：1993-01-29

Applicant: William J. Boardman ,  David P. Chan ,  Kuang-Yeh Chang ,  Calvin T. Gabriel ,  Vivek Jain ,  Subhash R. Nariani

Inventor： William J. Boardman ,  David P. Chan ,  Kuang-Yeh Chang ,  Calvin T. Gabriel ,  Vivek Jain ,  Subhash R. Nariani

IPC: H01L21/768 ,  H01L23/525 ,  H01L21/70 ,  H01L27/00

CPC classification number: H01L23/5252 ,  H01L21/76888 ,  H01L2924/0002

Abstract: A method for making an anti-fuse structure characterized by the steps of forming a conductive base layer; forming an anti-fuse layer over the base layer; patterning the anti-fuse layer to form an anti-fuse island; forming an insulating layer over the anti-fuse island; forming a via hole through the insulating layer to the anti-fuse island; forming a conductive connection layer over the insulating layer and within the via hole; and patterning the conductive connection layer to form a conductive contact to the anti-fuse island. Preferably, the anti-fuse island comprises amorphous silicon which can optionally be covered with a thin layer of a titanium-tungsten alloy.

Abstract translation: 一种制造抗熔丝结构的方法，其特征在于形成导电基层的步骤; 在基层上形成抗熔丝层; 图案化抗熔丝层以形成抗熔丝岛; 在反熔丝岛上形成绝缘层; 形成通过所述绝缘层到所述反熔丝岛的通孔; 在所述绝缘层上并在所述通孔内形成导电连接层; 以及图案化所述导电连接层以形成与所述反熔丝岛的导电接触。 优选地，抗熔丝岛包括非晶硅，其可任选地被钛 - 钨合金的薄层覆盖。