ESD detection circuit and related method thereof
    61.
    发明授权
    ESD detection circuit and related method thereof 有权
    ESD检测电路及其相关方法

    公开(公告)号:US07884617B2

    公开(公告)日:2011-02-08

    申请号:US12334496

    申请日:2008-12-14

    IPC分类号: H01H31/02

    CPC分类号: H02H9/046

    摘要: An electro-static discharge (ESD) detection circuit is provided. The ESD detection circuit includes: a first power pad for receiving a first supply voltage; a second power pad for receiving a second supply voltage; an RC circuit having an impedance component coupled between the first power pad and a first terminal and having an capacitive component coupled between the first terminal and a second terminal, wherein the second terminal is not directly connected to the second supply voltage; a trigger circuit couples to the first power pad, the second power pad, and the RC circuit, for generating an ESD trigger signal according to a voltage level at the first terminal and a voltage level at the second terminal, and a bias circuit coupled between the first power pad and the second power pad for providing a bias voltage to the second terminal.

    摘要翻译: 提供静电放电(ESD)检测电路。 ESD检测电路包括:用于接收第一电源电压的第一电源焊盘; 用于接收第二电源电压的第二电源焊盘; RC电路,其阻抗分量耦合在第一功率焊盘和第一端子之间,并具有耦合在第一端子和第二端子之间的电容部件,其中第二端子不直接连接到第二电源电压; 触发电路耦合到第一功率焊盘,第二功率焊盘和RC电路,用于根据第一端子处的电压电平和第二端子处的电压电平产生ESD触发信号,以及耦合在第二端子之间的偏置电路 所述第一功率垫和所述第二功率垫用于向所述第二端子提供偏置电压。

    Electrostatic discharge protection device and related circuit
    62.
    发明授权
    Electrostatic discharge protection device and related circuit 有权
    静电放电保护装置及相关电路

    公开(公告)号:US07880195B2

    公开(公告)日:2011-02-01

    申请号:US12329636

    申请日:2008-12-08

    IPC分类号: H01L29/66

    CPC分类号: H01L27/0262

    摘要: An ESD protection device comprises a P-type substrate, a first substrate-triggered silicon controlled rectifiers (STSCR) disposed in the P-type substrate and a second STSCR disposed in the P-type substrate. The first STSCR comprises a first N-well, a first P-well, a first N+ diffusion region, a first P+ diffusion region, and a first trigger node. The second STSCR comprises a second N-well electrically connected to the first N-well, a second P-well electrically connected to the first P-well, a second N+ diffusion region electrically connected to the first P+ diffusion region, a second P+ diffusion region electrically connected to the first N+ diffusion region, and a second trigger node. A layout area of an integrated circuit and a pin-to-pin ESD current path can be reduced.

    摘要翻译: ESD保护装置包括P型衬底,设置在P型衬底中的第一衬底触发的可控硅整流器(STSCR)和设置在P型衬底中的第二STSCR。 第一STSCR包括第一N阱,第一P阱,第一N +扩散区,第一P +扩散区和第一触发节点。 第二STSCR包括电连接到第一N阱的第二N阱,电连接到第一P阱的第二P阱,电连接到第一P +扩散区的第二N +扩散区,第二P +扩散 电连接到第一N +扩散区域的区域和第二触发器节点。 可以减小集成电路的布局区域和引脚到针脚ESD电流路径。

    INITIAL-ON SCR DEVICE FOR ON-CHIP ESD PROTECTION
    63.
    发明申请
    INITIAL-ON SCR DEVICE FOR ON-CHIP ESD PROTECTION 有权
    用于片上ESD保护的初始化SCR器件

    公开(公告)号:US20110013326A1

    公开(公告)日:2011-01-20

    申请号:US12891474

    申请日:2010-09-27

    IPC分类号: H02H9/04 H01L27/06

    摘要: A semiconductor device for electrostatic discharge (ESD) protection comprises a silicon controlled rectifier (SCR) including a semiconductor substrate, a first well formed in the substrate, a second well formed in the substrate, a first p-type region formed in the first well to serve as an anode, and a first n-type region partially formed in the second well to serve as a cathode, a p-type metal-oxide-semiconductor (PMOS) transistor formed in the first well including a gate, a first diffused region and a second diffused region separated apart from the first diffused region, a second n-type region formed in the first well electrically connected to the first diffused region of the PMOS transistor, and a second p-type region formed in the substrate electrically connected to the second diffused region of the PMOS transistor.

    摘要翻译: 一种用于静电放电(ESD)保护的半导体器件包括可控硅整流器(SCR),其包括半导体衬底,形成在衬底中的第一阱,在衬底中形成的第二阱,形成在第一阱中的第一p型区 用作阳极,以及部分地形成在第二阱中用作阴极的第一n型区域,形成在包括栅极的第一阱中的p型金属氧化物半导体(PMOS)晶体管,第一扩散层 区域和与第一扩散区域分离的第二扩散区域,形成在电连接到PMOS晶体管的第一扩散区域的第一阱中的第二n型区域和形成在衬底中的第二p型区域电连接 到PMOS晶体管的第二扩散区域。

    Current source circuit
    64.
    发明授权
    Current source circuit 有权
    电流源电路

    公开(公告)号:US07808309B2

    公开(公告)日:2010-10-05

    申请号:US12022979

    申请日:2008-01-30

    IPC分类号: G05F1/10 G05F3/02

    CPC分类号: G05F3/242

    摘要: A current source circuit is provided. The circuit includes a first transistor and at least one second transistor. A first source/drain terminal of the first transistor is coupled to a bias voltage. A second source/drain terminal of the first transistor is used to receive a current signal, and the second source/drain terminal of the first transistor is coupled to a gate terminal of the first transistor. A first source/drain terminal of the second transistor is grounded. A second source/drain terminal of the second transistor is coupled to a voltage source and outputs a bias current. A gate terminal of the second transistor is coupled to the gate terminal of the first transistor.

    摘要翻译: 提供电流源电路。 该电路包括第一晶体管和至少一个第二晶体管。 第一晶体管的第一源极/漏极端子耦合到偏置电压。 第一晶体管的第二源极/漏极端子用于接收电流信号,并且第一晶体管的第二源极/漏极端子耦合到第一晶体管的栅极端子。 第二晶体管的第一源极/漏极端子接地。 第二晶体管的第二源极/漏极端子耦合到电压源并输出偏置电流。 第二晶体管的栅极端子耦合到第一晶体管的栅极端子。

    ELECTROSTATIC DISCHARGE PROTECTION DEVICE AND RELATED CIRCUIT
    65.
    发明申请
    ELECTROSTATIC DISCHARGE PROTECTION DEVICE AND RELATED CIRCUIT 有权
    静电放电保护装置及相关电路

    公开(公告)号:US20100140659A1

    公开(公告)日:2010-06-10

    申请号:US12329636

    申请日:2008-12-08

    IPC分类号: H01L29/74

    CPC分类号: H01L27/0262

    摘要: An ESD protection device comprises a P-type substrate, a first substrate-triggered silicon controlled rectifiers (STSCR) disposed in the P-type substrate and a second STSCR disposed in the P-type substrate. The first STSCR comprises a first N-well, a first P-well, a first N+ diffusion region, a first P+ diffusion region, and a first trigger node. The second STSCR comprises a second N-well electrically connected to the first N-well, a second P-well electrically connected to the first P-well, a second N+ diffusion region electrically connected to the first P+ diffusion region, a second P+ diffusion region electrically connected to the first N+ diffusion region, and a second trigger node. A layout area of an integrated circuit and a pin-to-pin ESD current path can be reduced.

    摘要翻译: ESD保护装置包括P型衬底,设置在P型衬底中的第一衬底触发的可控硅整流器(STSCR)和设置在P型衬底中的第二STSCR。 第一STSCR包括第一N阱,第一P阱,第一N +扩散区,第一P +扩散区和第一触发节点。 第二STSCR包括电连接到第一N阱的第二N阱,电连接到第一P阱的第二P阱,电连接到第一P +扩散区的第二N +扩散区,第二P +扩散 电连接到第一N +扩散区域的区域和第二触发器节点。 可以减小集成电路的布局区域和引脚到针脚ESD电流路径。

    ESD PROTECTION CIRCUITRY WITH MULTI-FINGER SCRS
    66.
    发明申请
    ESD PROTECTION CIRCUITRY WITH MULTI-FINGER SCRS 有权
    ESD保护电路与多指针SCRS

    公开(公告)号:US20100118454A1

    公开(公告)日:2010-05-13

    申请号:US12269860

    申请日:2008-11-12

    IPC分类号: H02H7/00

    CPC分类号: H01L27/0262 H01L27/0251

    摘要: Self-triggered Multi-finger SCRs used in ESD protection circuitry capable of turning on all SCR fingers of the multi-finger SCRs include a first source, a second source, N SCR units, (N−1) diodes, and N resistors. Each of the N SCR units includes a first node, a second node coupled to the second source, and a trigger node. An nth diode of the (N−1) diodes is coupled between a first node of an nth SCR unit and a trigger node of an (n+1)th SCR unit. An nth resistor is coupled between the first node of the nth SCR unit and the first source, wherein n and N are integers. The (N−1) diodes can be replaced by directly coupled the first node of the nth SCR unit to the trigger node of the (n+1)th SCR unit when a trigger pulse is applied at the trigger node of a first SCR unit.

    摘要翻译: 能够接通多指SCR的所有SCR指状物的ESD保护电路中使用的自触发多指SCR包括第一源,第二源,N个SCR单元,(N-1)二极管和N个电阻器。 N个SCR单元中的每一个包括第一节点,耦合到第二源的第二节点和触发节点。 (N-1)二极管的第n个二极管耦合在第n个SCR单元的第一节点和第(n + 1)个SCR单元的触发节点之间。 第n个电阻耦合在第n个SCR单元的第一个节点和第一个源之间,其中n和N是整数。 当在第一SCR单元的触发节点处施加触发脉冲时,可以将第N个SCR单元的第一节点直接耦合到第(n + 1)个SCR单元的触发节点来代替(N-1) 。

    TRANSIENT TO DIGITAL CONVERTERS
    67.
    发明申请
    TRANSIENT TO DIGITAL CONVERTERS 有权
    瞬态转换器

    公开(公告)号:US20090231765A1

    公开(公告)日:2009-09-17

    申请号:US12047356

    申请日:2008-03-13

    IPC分类号: H02H9/04

    CPC分类号: G01R31/002 G01R19/10

    摘要: A digital converter including a first adjustment unit and a first transient detection unit. The first adjustment unit adjusts amplitude of an electrostatic discharge (ESD) pulse to generate a first adjustment signal when an ESD event occurs in a first power line and a second power line is at a complementary level. The first transient detection unit generates a first digital code according to the first adjustment signal.

    摘要翻译: 一种数字转换器,包括第一调整单元和第一瞬态检测单元。 当在第一电力线中发生ESD事件并且第二电力线处于互补电平时,第一调整单元调节静电放电(ESD)脉冲的幅度以产生第一调整信号。 第一瞬态检测单元根据第一调整信号产生第一数字码。

    POWER-RAIL ESD PROTECTION CIRCUIT WITHOUT LOCK-ON FAILURE
    68.
    发明申请
    POWER-RAIL ESD PROTECTION CIRCUIT WITHOUT LOCK-ON FAILURE 有权
    没有锁定故障的电源线ESD保护电路

    公开(公告)号:US20090086392A1

    公开(公告)日:2009-04-02

    申请号:US12018224

    申请日:2008-01-23

    IPC分类号: H02H9/00

    CPC分类号: H02H9/046

    摘要: An ESD protection circuit including a discharge device, a first detection circuit, and a second detection circuit. The discharge device provides a discharge path between a first power rail and a second power rail when the discharge device is activated. The discharge device stops providing the discharge path when the discharge device is de-activated. The first detection circuit is coupled between the first and the second power rails. The first detection circuit activates the discharge device when an ESD event occurs in the first power rail. The second detection circuit de-activates the discharge device when the ESD event does not occur in the first power rail.

    摘要翻译: 一种包括放电装置,第一检测电路和第二检测电路的ESD保护电路。 当排出装置被激活时,排放装置提供在第一动力轨道和第二动力轨道之间的排放路径。 当放电装置被去激活时,放电装置停止提供放电路径。 第一检测电路耦合在第一和第二电源轨之间。 当在第一电力轨道中发生ESD事件时,第一检测电路激活放电装置。 当在第一电力轨上没有发生ESD事件时,第二检测电路解除激活放电装置。

    Turn-on-efficient bipolar structures for on-chip ESD protection

    公开(公告)号:US07494854B2

    公开(公告)日:2009-02-24

    申请号:US11768814

    申请日:2007-06-26

    IPC分类号: H01L29/74 H01L21/332

    CPC分类号: H01L27/0266

    摘要: A semiconductor device suitable for applications in an electrostatic discharge (ESD) protection circuit, including a semiconductor substrate, a first well formed in the substrate, a second well formed in the substrate, and a first doped region formed in the second well, wherein the first well, the second well, and the first doped region collectively form a parasitic bipolar junction transistor (BJT), and wherein the first well is the collector of the BJT, the second well is the base of the BJT, and the first doped region is the emitter of the BJT.

    CURRENT SOURCE CIRCUIT
    70.
    发明申请
    CURRENT SOURCE CIRCUIT 有权
    电流源电路

    公开(公告)号:US20080297238A1

    公开(公告)日:2008-12-04

    申请号:US12022979

    申请日:2008-01-30

    IPC分类号: G05F1/10

    CPC分类号: G05F3/242

    摘要: A current source circuit is provided. The circuit includes a first transistor and at least one second transistor. A first source/drain terminal of the first transistor is coupled to a bias voltage. A second source/drain terminal of the first transistor is used to receive a current signal, and the second source/drain terminal of the first transistor is coupled to a gate terminal of the first transistor. A first source/drain terminal of the second transistor is grounded. A second source/drain terminal of the second transistor is coupled to a voltage source and outputs a bias current. A gate terminal of the second transistor is coupled to the gate terminal of the first transistor.

    摘要翻译: 提供电流源电路。 该电路包括第一晶体管和至少一个第二晶体管。 第一晶体管的第一源极/漏极端子耦合到偏置电压。 第一晶体管的第二源极/漏极端子用于接收电流信号,并且第一晶体管的第二源极/漏极端子耦合到第一晶体管的栅极端子。 第二晶体管的第一源极/漏极端子接地。 第二晶体管的第二源极/漏极端子耦合到电压源并输出偏置电流。 第二晶体管的栅极端子耦合到第一晶体管的栅极端子。