公开(公告)号：US09257594B2

公开(公告)日：2016-02-09

申请号：US12553119

申请日：2009-09-03

申请人： Shunpei Yamazaki ,  Kengo Akimoto ,  Shigeki Komori ,  Hideki Uochi

发明人： Shunpei Yamazaki ,  Kengo Akimoto ,  Shigeki Komori ,  Hideki Uochi

IPC分类号： H01L29/10 ,  H01L33/00 ,  H01L27/12 ,  H01L29/786 ,  H01L29/66

CPC分类号： H01L33/0041 ,  H01L27/1225 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/7869 ,  H01L2924/0002 ,  H01L2924/00

摘要： An object is to provide a semiconductor device including a thin film transistor with excellent electrical characteristics and high reliability and a method for manufacturing the semiconductor device with high mass productivity. A main point is to form a low-resistance oxide semiconductor layer as a source or drain region after forming a drain or source electrode layer over a gate insulating layer and to form an oxide semiconductor film thereover as a semiconductor layer. It is preferable that an oxygen-excess oxide semiconductor layer be used as a semiconductor layer and an oxygen-deficient oxide semiconductor layer be used as a source region and a drain region.

摘要翻译： 本发明的目的是提供一种包括具有优异的电特性和高可靠性的薄膜晶体管的半导体器件以及用于制造具有高质量生产率的半导体器件的方法。 要点是在栅极绝缘层上形成漏极或源电极层之后形成作为源极或漏极区的低电阻氧化物半导体层，并在其上形成作为半导体层的氧化物半导体膜。 优选使用氧 - 过量氧化物半导体层作为半导体层，并且使用缺氧氧化物半导体层作为源极区和漏极区。

公开(公告)号：US09024309B2

公开(公告)日：2015-05-05

申请号：US12556704

申请日：2009-09-10

申请人： Shunpei Yamazaki ,  Kengo Akimoto ,  Shigeki Komori ,  Hideki Uochi ,  Tomoya Futamura ,  Takahiro Kasahara

发明人： Shunpei Yamazaki ,  Kengo Akimoto ,  Shigeki Komori ,  Hideki Uochi ,  Tomoya Futamura ,  Takahiro Kasahara

IPC分类号： H01L33/00 ,  H01L27/12 ,  G02F1/1362 ,  H01L27/02 ,  H01L29/786

摘要： A protective circuit includes a non-linear element which includes a gate electrode, a gate insulating layer covering the gate electrode, a first oxide semiconductor layer overlapping with the gate electrode over the gate insulating layer, and a first wiring layer and a second wiring layer whose end portions overlap with the gate electrode over the first oxide semiconductor layer and in which a conductive layer and a second oxide semiconductor layer are stacked. Over the gate insulating layer, oxide semiconductor layers with different properties are bonded to each other, whereby stable operation can be performed as compared with Schottky junction. Thus, the junction leakage can be reduced and the characteristics of the non-linear element can be improved.

公开(公告)号：US09000431B2

公开(公告)日：2015-04-07

申请号：US13344015

申请日：2012-01-05

申请人： Hidekazu Miyairi ,  Takeshi Osada ,  Kengo Akimoto ,  Shunpei Yamazaki

发明人： Hidekazu Miyairi ,  Takeshi Osada ,  Kengo Akimoto ,  Shunpei Yamazaki

IPC分类号： H01L29/786 ,  H01L29/423 ,  H01L27/12

CPC分类号： H01L29/78648 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/42384 ,  H01L29/78645 ,  H01L29/7869 ,  H01L29/78696

摘要： As a display device has a higher definition, the number of pixels, gate lines, and signal lines are increased. When the number of the gate lines and the signal lines are increased, there occurs a problem that it is difficult to mount an IC chip including a driver circuit for driving the gate and signal lines by bonding or the like, whereby manufacturing cost is increased. A pixel portion and a driver circuit for driving the pixel portion are provided over the same substrate, and at least part of the driver circuit includes a thin film transistor using an oxide semiconductor interposed between gate electrodes provided above and below the oxide semiconductor. The pixel portion and the driver portion are provided over the same substrate, whereby manufacturing cost can be reduced.

摘要翻译： 作为显示装置具有更高的清晰度，像素数，栅极线和信号线的数量增加。 当栅极线和信号线的数量增加时，存在难以安装包括用于通过接合等驱动栅极和信号线的驱动电路的IC芯片，由此增加制造成本的问题。 用于驱动像素部分的像素部分和驱动电路设置在相同的基板上，驱动电路的至少一部分包括薄膜晶体管，该薄膜晶体管使用介于氧化物半导体上方和下方的栅电极之间的氧化物半导体。 像素部分和驱动器部分设置在相同的基板上，由此可以降低制造成本。

公开(公告)号：US08980684B2

公开(公告)日：2015-03-17

申请号：US13346963

申请日：2012-01-10

申请人： Shunpei Yamazaki ,  Hidekazu Miyairi ,  Kengo Akimoto ,  Kojiro Shiraishi

发明人： Shunpei Yamazaki ,  Hidekazu Miyairi ,  Kengo Akimoto ,  Kojiro Shiraishi

IPC分类号： H01L27/12 ,  H01L29/786

摘要： It is an object to provide a semiconductor device including a thin film transistor with favorable electric properties and high reliability, and a method for manufacturing the semiconductor device with high productivity. In an inverted staggered (bottom gate) thin film transistor, an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer, and a buffer layer formed using a metal oxide layer is provided between the semiconductor layer and a source and drain electrode layers. The metal oxide layer is intentionally provided as the buffer layer between the semiconductor layer and the source and drain electrode layers, whereby ohmic contact is obtained.

公开(公告)号：US08945981B2

公开(公告)日：2015-02-03

申请号：US12511273

申请日：2009-07-29

申请人： Shunpei Yamazaki ,  Hidekazu Miyairi ,  Kengo Akimoto ,  Kojiro Shiraishi

发明人： Shunpei Yamazaki ,  Hidekazu Miyairi ,  Kengo Akimoto ,  Kojiro Shiraishi

IPC分类号： H01L21/00 ,  H01L29/786 ,  H01L27/12

CPC分类号： H01L29/7869 ,  H01L27/1225 ,  H01L29/78606

摘要： To provide a semiconductor device including a thin film transistor having excellent electric characteristics and high reliability and a manufacturing method of the semiconductor device with high mass productivity. The summary is that an inverted-staggered (bottom-gate) thin film transistor is included in which an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer, a channel protective layer is provided in a region that overlaps a channel formation region of the semiconductor layer, and a buffer layer is provided between the semiconductor layer and source and drain electrodes. An ohmic contact is formed by intentionally providing the buffer layer having a higher carrier concentration than the semiconductor layer between the semiconductor layer and the source and drain electrodes.

摘要翻译： 提供一种包括具有优异的电特性和高可靠性的薄膜晶体管的半导体器件和具有高质量生产率的半导体器件的制造方法。 总而言之，包括使用含有In，Ga和Zn的氧化物半导体膜作为半导体层的反交错（底栅极）薄膜晶体管，沟道保护层设置在与 沟道形成区域，并且在半导体层和源极和漏极之间设置有缓冲层。 通过有意地提供具有比半导体层和源极和漏极之间的半导体层更高的载流子浓度的缓冲层来形成欧姆接触。

公开(公告)号：US08742422B2

公开(公告)日：2014-06-03

申请号：US12871148

申请日：2010-08-30

申请人： Masayuki Sakakura ,  Yoshiaki Oikawa ,  Shunpei Yamazaki ,  Junichiro Sakata ,  Masashi Tsubuku ,  Kengo Akimoto ,  Miyuki Hosoba

发明人： Masayuki Sakakura ,  Yoshiaki Oikawa ,  Shunpei Yamazaki ,  Junichiro Sakata ,  Masashi Tsubuku ,  Kengo Akimoto ,  Miyuki Hosoba

IPC分类号： H01L27/14 ,  H01L29/04 ,  H01L29/15 ,  H01L31/036

CPC分类号： H01L27/124 ,  G02F1/134309 ,  G02F1/13454 ,  G02F1/1368 ,  G02F2202/10 ,  H01L27/1225 ,  H01L27/1255

摘要： The semiconductor device includes a driver circuit portion including a driver circuit and a pixel portion including a pixel. The pixel includes a gate electrode layer having a light-transmitting property, a gate insulating layer, a source electrode layer and a drain electrode layer each having a light-transmitting property provided over the gate insulating layer, an oxide semiconductor layer covering top surfaces and side surfaces of the source electrode layer and the drain electrode layer and provided over the gate electrode layer with the gate insulating layer therebetween, a conductive layer provided over part of the oxide semiconductor layer and having a lower resistance than the source electrode layer and the drain electrode layer, and an oxide insulating layer in contact with part of the oxide semiconductor layer.

摘要翻译： 半导体器件包括驱动器电路部分，其包括驱动器电路和包括像素的像素部分。 像素包括具有透光性的栅极电极层，栅极绝缘层，源极电极层和漏极电极层，其各自具有设置在栅极绝缘层上的透光性，覆盖顶表面的氧化物半导体层和 源极电极层和漏极电极层的侧面，并且在栅电极层之间设置有栅极绝缘层，导电层设置在氧化物半导体层的一部分上，并且具有比源极电极层和漏极 电极层和与氧化物半导体层的一部分接触的氧化物绝缘层。

公开(公告)号：US08547493B2

公开(公告)日：2013-10-01

申请号：US12899265

申请日：2010-10-06

申请人： Shunpei Yamazaki ,  Suzunosuke Hiraishi ,  Kengo Akimoto ,  Junichiro Sakata

发明人： Shunpei Yamazaki ,  Suzunosuke Hiraishi ,  Kengo Akimoto ,  Junichiro Sakata

IPC分类号： G02F1/136 ,  G09G3/36 ,  H01L29/04

CPC分类号： H01L29/7869 ,  H01L27/1225 ,  H01L29/45

摘要： An object is to reduce contact resistance between an oxide semiconductor layer and source and drain electrode layers electrically connected to the oxide semiconductor layer in a thin film transistor including the oxide semiconductor layer. The source and drain electrode layers have a stacked structure of two or more layers. In this stack of layers, a layer in contact with the oxide semiconductor layer is a thin indium layer or a thin indium-alloy layer. Note that the oxide semiconductor layer contains indium. A second layer or second and any of subsequent layers in the source and drain electrode layers are formed using an element selected from Al, Cr, Cu, Ta, Ti, Mo, and W, an alloy containing any of these elements as a component, an alloy containing any of these elements in combination, or the like.

摘要翻译： 本发明的目的是减少在包括氧化物半导体层的薄膜晶体管中氧化物半导体层与与氧化物半导体层电连接的源极和漏极电极层之间的接触电阻。 源极和漏极电极层具有两层或更多层的堆叠结构。 在该堆叠层中，与氧化物半导体层接触的层是薄的铟层或薄的铟 - 合金层。 注意，氧化物半导体层含有铟。 使用选自Al，Cr，Cu，Ta，Ti，Mo和W的元素来形成源极和漏极电极层中的第二层或第二层和后续层中的任何一层，包含任何这些元素作为组分的合金， 合并这些元素中的任何一种的合金等。

公开(公告)号：US08518739B2

公开(公告)日：2013-08-27

申请号：US12615615

申请日：2009-11-10

申请人： Hidekazu Miyairi ,  Takeshi Osada ,  Kengo Akimoto ,  Shunpei Yamazaki

发明人： Hidekazu Miyairi ,  Takeshi Osada ,  Kengo Akimoto ,  Shunpei Yamazaki

IPC分类号： H01L21/00 ,  H01L21/16

CPC分类号： H01L29/7869 ,  H01L27/1225 ,  H01L29/78648

摘要： As a display device has a higher definition, the number of pixels, gate lines, and signal lines are increased. When the number of the gate lines and the signal lines are increased, there occurs a problem that it is difficult to mount an IC chip including a driver circuit for driving the gate and signal lines by bonding or the like, whereby manufacturing cost is increased. A pixel portion and a driver circuit for driving the pixel portion are provided over the same substrate, and at least part of the driver circuit includes a thin film transistor using an oxide semiconductor interposed between gate electrodes provided above and below the oxide semiconductor. Therefore, when the pixel portion and the driver circuit are provided over the same substrate, manufacturing cost can be reduced.

公开(公告)号：US08502233B2

公开(公告)日：2013-08-06

申请号：US13246894

申请日：2011-09-28

申请人： Shunpei Yamazaki ,  Kengo Akimoto

发明人： Shunpei Yamazaki ,  Kengo Akimoto

IPC分类号： H01L33/00

CPC分类号： H01L51/5206 ,  H01L27/3244 ,  H01L51/0037 ,  H01L51/0052 ,  H01L51/007 ,  H01L51/0071 ,  H01L51/0077 ,  H01L51/0081 ,  H01L51/5048

摘要： It is an object of the present invention to provide a semiconductor device, in particular, a light emitting element which can be easily manufactured with a wet method. One feature of the invention is a light emitting device including a transistor and a light emitting element. In the light emitting element, an organic layer, a light emitting layer, and a second electrode are sequentially formed over a first electrode, and the transistor is electrically connected to the light emitting element through a wiring. Here, the wiring contains aluminum, carbon, and titanium. The organic layer is formed by a wet method. The first electrode which is in contact with the organic layer is formed from indium tin oxide containing titanium oxide.

公开(公告)号：US08501555B2

公开(公告)日：2013-08-06

申请号：US12556590

申请日：2009-09-10

申请人： Shunpei Yamazaki ,  Kengo Akimoto ,  Shigeki Komori ,  Hideki Uochi

发明人： Shunpei Yamazaki ,  Kengo Akimoto ,  Shigeki Komori ,  Hideki Uochi

IPC分类号： H01L21/00 ,  H01L21/84

CPC分类号： H01L27/124 ,  H01L27/1225 ,  H01L29/7869

摘要： It is an object of the present invention to provide a thin film transistor in which an oxide semiconductor film containing indium (In), gallium (Ga), and zinc (Zn) is used and contact resistance of a source or a drain electrode layer is reduced, and a manufacturing method thereof. An IGZO layer is provided over the source electrode layer and the drain electrode layer, and source and drain regions having lower oxygen concentration than the IGZO semiconductor layer are intentionally provided between the source and drain electrode layers and the gate insulating layer, so that ohmic contact is made.

摘要翻译： 本发明的目的是提供一种薄膜晶体管，其中使用含有铟（In），镓（Ga）和锌（Zn）的氧化物半导体膜，源极或漏极层的接触电阻为 还原及其制造方法。 在源极电极层和漏极电极层上设置有IGZO层，在源电极层和漏极电极层以及栅极绝缘层之间有意设置具有比IGZO半导体层低的氧浓度的源极和漏极区域，使得欧姆接触 是做的