公开(公告)号：US20100133539A1

公开(公告)日：2010-06-03

申请号：US12571345

申请日：2009-09-30

申请人： Hoon KANG ,  Yun-Seok Lee ,  Jae-Sung Kim ,  Yang-Ho Jung ,  Young-Je Cho ,  Cheon-Jae Maeng ,  Woo-Geun Lee

发明人： Hoon KANG ,  Yun-Seok Lee ,  Jae-Sung Kim ,  Yang-Ho Jung ,  Young-Je Cho ,  Cheon-Jae Maeng ,  Woo-Geun Lee

IPC分类号： H01L29/40 ,  H01L21/77

CPC分类号： H01L29/78642 ,  H01L27/12 ,  H01L29/42384

摘要： Provided is a thin-film transistor (TFT) substrate. The TFT substrate includes: an insulating substrate; a semiconductor pattern which is formed on the insulating substrate, the semiconductor pattern having a top surface and a bottom surface; a source electrode and a drain electrode which are disposed on the top and bottom surfaces of the semiconductor pattern, respectively; a gate electrode which is disposed alongside the semiconductor pattern with a gate insulating film interposed therebetween; a data line which is connected to the source electrode and extends in a first direction; a gate line which is connected to the gate electrode and extends in a second direction; and a pixel electrode which is connected to the drain electrode and is formed in a pixel region.

摘要翻译： 提供了薄膜晶体管（TFT）基板。 TFT基板包括：绝缘基板; 形成在所述绝缘基板上的半导体图案，所述半导体图案具有顶面和底面; 源电极和漏电极，分别设置在半导体图案的顶表面和底表面上; 栅极电极，其间设置有栅极绝缘膜并且位于半导体图案的旁边; 数据线，其连接到所述源电极并沿第一方向延伸; 栅极线，其连接到所述栅电极并沿第二方向延伸; 以及连接到漏电极并形成在像素区域中的像素电极。

公开(公告)号：US20090184326A1

公开(公告)日：2009-07-23

申请号：US12332117

申请日：2008-12-10

申请人： Woo-Geun Lee ,  Jae-Hyoung Youn ,  Ki-Won Kim ,  Jong-In Kim

发明人： Woo-Geun Lee ,  Jae-Hyoung Youn ,  Ki-Won Kim ,  Jong-In Kim

IPC分类号： H01L33/00

CPC分类号： H01L27/124 ,  G02F1/136286

摘要： A display substrate includes a base substrate, a gate line, a gate insulation layer, a data line, a thin-film transistor (TFT) and a pixel electrode. The gate line is extended in a first direction on the base substrate. The gate insulation layer is formed on the base substrate to cover the gate line. The data line is extended in a second direction and intersects the gate line at an intersecting portion. At the intersecting portion, the data line is separated from the gate line by an air gap. In another embodiment, the data line also includes at least one etching hole extending to the air gap. The TFT is electrically connected to the data and the gate lines. The pixel electrode is electrically connected to the TFT.

摘要翻译： 显示基板包括基底基板，栅极线，栅极绝缘层，数据线，薄膜晶体管（TFT）和像素电极。 栅极线在基底基板上沿第一方向延伸。 栅极绝缘层形成在基底基板上以覆盖栅极线。 数据线在第二方向上延伸并且在相交部分与栅极线相交。 在交叉部分，数据线通过气隙与栅极线分离。 在另一个实施例中，数据线还包括延伸到气隙的至少一个蚀刻孔。 TFT与数据和栅极线电连接。 像素电极电连接到TFT。

公开(公告)号：US20090121228A1

公开(公告)日：2009-05-14

申请号：US12269748

申请日：2008-11-12

申请人： Jang-Soo Kim ,  Hong-Long Ning ,  Bong-Kyun Kim ,  Hong-Sick Park ,  Shi-Yul Kim ,  Chang-Oh Jeong ,  Sang-Gab Kim ,  Jae-Hyoung Youn ,  Woo-Geun Lee ,  Yang-Ho Bae ,  Pil-Sang Yun ,  Jong-Hyun Choung ,  Sun-Young Hong ,  Ki-Won Kim ,  Byeong-Jin Lee ,  Yopung-Wook Lee ,  Jong-In Kim ,  Byeong-Beom Kim ,  Nam-Seok Suh

发明人： Jang-Soo Kim ,  Hong-Long Ning ,  Bong-Kyun Kim ,  Hong-Sick Park ,  Shi-Yul Kim ,  Chang-Oh Jeong ,  Sang-Gab Kim ,  Jae-Hyoung Youn ,  Woo-Geun Lee ,  Yang-Ho Bae ,  Pil-Sang Yun ,  Jong-Hyun Choung ,  Sun-Young Hong ,  Ki-Won Kim ,  Byeong-Jin Lee ,  Yopung-Wook Lee ,  Jong-In Kim ,  Byeong-Beom Kim ,  Nam-Seok Suh

IPC分类号： H01L29/04 ,  H01L21/336

CPC分类号： G02F1/13458 ,  G02F1/136286 ,  G02F2001/136295 ,  H01L27/1218 ,  H01L27/124 ,  H01L27/1288

摘要： A gate line includes a first seed layer formed on a base substrate and a first metal layer formed on the first seed layer. A first insulation layer is formed on the base substrate. A second insulation layer is formed on the base substrate. Here, a line trench is formed through the second insulation layer in a direction crossing the gate line. A data line includes a second seed layer formed below the line trench and a second metal layer formed in the line trench. A pixel electrode is formed in a pixel area of the base substrate. Therefore, a trench of a predetermined depth is formed using an insulation layer and a metal layer is formed through a plating method, so that a metal line having a sufficient thickness may be formed.

摘要翻译： 栅极线包括形成在基底基板上的第一籽晶层和形成在第一籽晶层上的第一金属层。 在基底基板上形成第一绝缘层。 在基底基板上形成第二绝缘层。 这里，在与栅极线交叉的方向上通过第二绝缘层形成线沟槽。 数据线包括形成在线沟槽下方的第二晶种层和形成在线沟槽中的第二金属层。 像素电极形成在基底基板的像素区域中。 因此，使用绝缘层形成预定深度的沟槽，并且通过电镀方法形成金属层，从而可以形成具有足够厚度的金属线。

公开(公告)号：US07371621B2

公开(公告)日：2008-05-13

申请号：US11486330

申请日：2006-07-12

申请人： Sang-Gab Kim ,  Woo-Geun Lee ,  Shi-Yul Kim ,  Jin-Ho Ju ,  Jang-Soo Kim ,  Sang-Woo Whangbo ,  Min-Seok Oh ,  Hye-Young Ryu ,  Hong-Kee Chin

发明人： Sang-Gab Kim ,  Woo-Geun Lee ,  Shi-Yul Kim ,  Jin-Ho Ju ,  Jang-Soo Kim ,  Sang-Woo Whangbo ,  Min-Seok Oh ,  Hye-Young Ryu ,  Hong-Kee Chin

IPC分类号： H01L21/00

CPC分类号： H01L27/124 ,  G02F2001/13629 ,  H01L29/458

摘要： The present invention provides a manufacturing method of a thin film transistor array panel, which includes forming a gate line on a substrate; forming a gate insulating layer, a semiconductor layer, and an ohmic contact on the gate line; forming a first conducting film including Mo, a second conducting film including Al, and a third conducting film including Mo on the ohmic contact; forming a first photoresist pattern on the third conducting film; etching the first, second, and third conducting films, the ohmic contact, and the semiconductor layer using the first photoresist pattern as a mask; removing the first photoresist pattern by a predetermined thickness to form a second photoresist pattern; etching the first, second, and third conducting films using the second photoresist pattern as a mask to expose a portion of the ohmic contact; and etching the exposed ohmic contact using a Cl-containing gas and a F-containing gas.

摘要翻译： 本发明提供一种薄膜晶体管阵列面板的制造方法，其包括在基板上形成栅极线; 在栅极线上形成栅极绝缘层，半导体层和欧姆接触; 形成包括Mo的第一导电膜，包括Al的第二导电膜和在欧姆接触上包含Mo的第三导电膜; 在所述第三导电膜上形成第一光致抗蚀剂图案; 使用第一光致抗蚀剂图案作为掩模蚀刻第一，第二和第三导电膜，欧姆接触和半导体层; 将第一光致抗蚀剂图案去除预定厚度以形成第二光致抗蚀剂图案; 使用第二光致抗蚀剂图案作为掩模蚀刻第一，第二和第三导电膜以暴露欧姆接触的一部分; 并使用含Cl气体和含F气体蚀刻暴露的欧姆接触。

公开(公告)号：US07369188B2

公开(公告)日：2008-05-06

申请号：US11264598

申请日：2005-11-01

申请人： Woo-Geun Lee ,  Hye-Young Ryu

发明人： Woo-Geun Lee ,  Hye-Young Ryu

IPC分类号： G02F1/1343

CPC分类号： G02F1/1368 ,  H01L27/1255

摘要： In a thin film transistor substrate, a method of manufacturing the same, and a display apparatus having the same, a thin film transistor, a gate member, and a storage member are formed on an insulating substrate. The gate member has a gate line and a gate electrode electrically connected to the gate line, and the storage member has a storage line, a first storage electrode, and a second storage electrode. A data member is formed on an active layer. The data member includes a data line crossing the gate line, a third storage electrode overlapped with the first storage electrode and a fourth storage electrode overlapped with the second storage electrode. Thus, a capacitance variation of a storage capacitor may be prevented, thereby improving display quality of a display apparatus.

摘要翻译： 在绝缘基板上形成薄膜晶体管基板及其制造方法及具有该薄膜晶体管基板的显示装置，薄膜​​晶体管，栅极部件和存储部件。 栅极部件具有与栅极线电连接的栅极线和栅电极，并且存储部件具有存储线，第一存储电极和第二存储电极。 在有源层上形成数据元件。 数据构件包括与栅极线交叉的数据线，与第一存储电极重叠的第三存储电极和与第二存储电极重叠的第四存储电极。 因此，可以防止存储电容器的电容变化，从而提高显示装置的显示质量。

公开(公告)号：US20070145374A1

公开(公告)日：2007-06-28

申请号：US11646126

申请日：2006-12-27

申请人： Sang-Woo Whangbo ,  Shi-Yul Kim ,  Sung-Hoon Yang ,  Woo-Geun Lee

发明人： Sang-Woo Whangbo ,  Shi-Yul Kim ,  Sung-Hoon Yang ,  Woo-Geun Lee

IPC分类号： H01L29/04

CPC分类号： H01L29/4908 ,  H01L27/124 ,  H01L27/1288

摘要： A thin film transistor substrate includes a base substrate, a gate electrode, a gate insulating layer, a surface treating layer, an active layer, a source electrode and a drain electrode. The gate electrode is formed on the base substrate. The gate insulating layer is formed on the base substrate to cover the gate electrode. The surface treating layer is formed on the gate insulating layer by treating the gate insulating layer with a nitrogen-containing gas to prevent leakage current. The active layer is formed on the surface treating layer to cover the gate electrode. The source electrode and the gate electrode that are spaced apart from each other by a predetermined distance are formed on the active layer.

摘要翻译： 薄膜晶体管基板包括基底基板，栅极电极，栅极绝缘层，表面处理层，有源层，源电极和漏电极。 栅电极形成在基底基板上。 栅极绝缘层形成在基底基板上以覆盖栅电极。 通过用含氮气体处理栅极绝缘层，在栅极绝缘层上形成表面处理层，以防止漏电流。 在表面处理层上形成有源层以覆盖栅电极。 在有源层上形成彼此隔开预定距离的源电极和栅电极。

公开(公告)号：US20070096100A1

公开(公告)日：2007-05-03

申请号：US11584113

申请日：2006-10-20

申请人： Woo-Geun Lee ,  Jin-Ho Ju

发明人： Woo-Geun Lee ,  Jin-Ho Ju

IPC分类号： H01L29/04 ,  H01L21/84

CPC分类号： H01L29/78618 ,  H01L27/12 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/04 ,  H01L29/458 ,  H01L29/66765 ,  H01L29/78696

摘要： A thin film transistor according to an embodiment of the present invention includes: a substrate; a control electrode disposed on the substrate; a gate insulating layer disposed on the control electrode; a semiconductor member disposed on the gate insulating layer, overlapping the control electrode, and including a first portion of amorphous silicon and a second portion of polycrystalline silicon; an input electrode contacting the semiconductor member; and an output electrode contacting the semiconductor member.

摘要翻译： 根据本发明实施例的薄膜晶体管包括：衬底; 设置在所述基板上的控制电极; 设置在所述控制电极上的栅极绝缘层; 设置在所述栅极绝缘层上的半导体部件，与所述控制电极重叠，并且包括第一部分非晶硅和第二部分多晶硅; 接触半导体部件的输入电极; 以及与半导体部件接触的输出电极。

公开(公告)号：US20070012967A1

公开(公告)日：2007-01-18

申请号：US11486330

申请日：2006-07-12

申请人： Sang-Gab Kim ,  Woo-Geun Lee ,  Shi-Yul Kim ,  Jin-Ho Ju ,  Jang-Soo Kim ,  Sang-Woo Whangbo ,  Min-Seok Oh ,  Hye-Young Ryu ,  Hong-Kee Chin

发明人： Sang-Gab Kim ,  Woo-Geun Lee ,  Shi-Yul Kim ,  Jin-Ho Ju ,  Jang-Soo Kim ,  Sang-Woo Whangbo ,  Min-Seok Oh ,  Hye-Young Ryu ,  Hong-Kee Chin

IPC分类号： H01L31/113

CPC分类号： H01L27/124 ,  G02F2001/13629 ,  H01L29/458

摘要： The present invention provides a manufacturing method of a thin film transistor array panel, which includes forming a gate line on a substrate; forming a gate insulating layer, a semiconductor layer, and an ohmic contact on the gate line; forming a first conducting film including Mo, a second conducting film including Al, and a third conducting film including Mo on the ohmic contact; forming a first photoresist pattern on the third conducting film; etching the first, second, and third conducting films, the ohmic contact, and the semiconductor layer using the first photoresist pattern as a mask; removing the first photoresist pattern by a predetermined thickness to form a second photoresist pattern; etching the first, second, and third conducting films using the second photoresist pattern as a mask to expose a portion of the ohmic contact; and etching the exposed ohmic contact using a Cl-containing gas and a F-containing gas.

摘要翻译： 本发明提供一种薄膜晶体管阵列面板的制造方法，其包括在基板上形成栅极线; 在栅极线上形成栅极绝缘层，半导体层和欧姆接触; 形成包括Mo的第一导电膜，包括Al的第二导电膜和在欧姆接触上包含Mo的第三导电膜; 在所述第三导电膜上形成第一光致抗蚀剂图案; 使用第一光致抗蚀剂图案作为掩模蚀刻第一，第二和第三导电膜，欧姆接触和半导体层; 将第一光致抗蚀剂图案去除预定厚度以形成第二光致抗蚀剂图案; 使用第二光致抗蚀剂图案作为掩模蚀刻第一，第二和第三导电膜以暴露欧姆接触的一部分; 并使用含Cl气体和含F气体蚀刻暴露的欧姆接触。

公开(公告)号：US20060238667A1

公开(公告)日：2006-10-26

申请号：US11264598

申请日：2005-11-01

申请人： Woo-Geun Lee ,  Hye-Young Ryu

发明人： Woo-Geun Lee ,  Hye-Young Ryu

IPC分类号： G02F1/136

CPC分类号： G02F1/1368 ,  H01L27/1255

摘要： In a thin film transistor substrate, a method of manufacturing the same, and a display apparatus having the same, a thin film transistor, a gate member, and a storage member are formed on an insulating substrate. The gate member has a gate line and a gate electrode electrically connected to the gate line, and the storage member has a storage line, a first storage electrode, and a second storage electrode. A data member is formed on an active layer. The data member includes a data line crossing the gate line, a third storage electrode overlapped with the first storage electrode and a fourth storage electrode overlapped with the second storage electrode. Thus, a capacitance variation of a storage capacitor may be prevented, thereby improving display quality of a display apparatus.

摘要翻译： 在绝缘基板上形成薄膜晶体管基板及其制造方法及具有该薄膜晶体管基板的显示装置，薄膜​​晶体管，栅极部件和存储部件。 栅极部件具有与栅极线电连接的栅极线和栅电极，并且存储部件具有存储线，第一存储电极和第二存储电极。 在有源层上形成数据元件。 数据构件包括与栅极线交叉的数据线，与第一存储电极重叠的第三存储电极和与第二存储电极重叠的第四存储电极。 因此，可以防止存储电容器的电容变化，从而提高显示装置的显示质量。