摘要:
A Voice-Data-RF IC includes a baseband processing module, an RF section, and an interface module. The baseband processing module converts an outbound voice signal into an outbound voice symbol stream, converts an inbound voice symbol stream into an inbound voice signal, converts outbound data into an outbound data symbol stream, and converts an inbound data symbol stream into inbound data. The RF section converts an inbound RF voice signal into the inbound voice symbol stream, converts the outbound voice symbol stream into an outbound RF voice signal, converts an inbound RF data signal into the inbound data symbol stream, and converts the outbound data symbol stream into an outbound RF data signal. The interface module provides coupling between the baseband processing module, the RF section, and with off-chip circuits.
摘要:
An adjustable antenna interface includes a single-ended to differential conversion circuit, an adjustable impedance matching circuit, an RF differential switch, and an input. The single-ended to differential conversion circuit converts inbound RF signals from single-ended signals to differential signals and converts outbound RF signals from differential signals to single-ended signals. The adjustable impedance matching circuit provides an impedance based on an impedance control signal. The RF differential switch provides the differential outbound RF signals from the IC to the single-ended to differential conversion circuit in accordance with a first antenna control signal and provides the differential inbound RF signals from the single-ended to differential conversion circuit to the IC in accordance with a second antenna control signal. The input receives the first antenna control signal, the second antenna control signal, and the impedance control signal from the IC.
摘要:
A plurality of baseband clock signals by detecting an interference condition associated with at least one of the plurality of baseband clock signals and by spreading the spectrum of the at least one of the plurality of baseband clock signals when the interference condition is detected.
摘要:
A communication device includes a memory module that stores a plurality of applications corresponding to a plurality of uses of the communication device. A processing module executes a selected one of the plurality of applications and selects one of a plurality of power modes based on a current one of the plurality of uses of the communication device corresponding to the selected one of the plurality of applications. The processing module generates a power mode signal based on the selected one of the plurality of power modes. A power management circuit receives the power mode signal and that generates a plurality of power supply signals based on the power mode signal.
摘要:
A method for establishing wireless communication between a transmitter and a receiver in a wireless communication system is disclosed. The receiver includes an adaptive array that has at least two antennas. Each antenna receives a signal and produces a received signal. The transmitter includes at least two transmission channels for communicating the signal from the transmitter to the receiver. The wireless communication system suppresses interference at the receiver by applying an interference suppression technique when combining the received signals. The selection of a channel at the transmitter is based on the channel performance at the receiver for each transmission channel. The channel performance is based on a combining technique different from the interference suppression technique.
摘要:
A method for establishing wireless communication between a transmitter and a receiver in a wireless communication system is disclosed. The receiver includes an adaptive array that has at least two antennas. Each antenna receives a signal and produces a received signal. The transmitter includes at least two transmission channels for communicating the signal from the transmitter to the receiver. The wireless communication system suppresses interference at the receiver by applying an interference suppression technique when combining the received signals. The selection of a channel at the transmitter is based on the channel performance at the receiver for each transmission channel. The channel performance is based on a combining technique different from the interference suppression technique.
摘要:
A single chip wireless transceiver operable to perform voice, data and radio frequency (RF) processing is provided. This processing may be divided between various processing modules. This single chip includes a processing module having an ARM microprocessor and a digital signal processor (DSP), an RF section, and an interface module. The processing module converts an outbound voice signal into an outbound voice symbol stream, converts an inbound voice symbol stream into an inbound voice signal, converts outbound data into an outbound data symbol stream, and converts an inbound data symbol stream into inbound data. These functions may be divided between the ARM microprocessor and DSP, where the DSP supports physically layer type applications and the ARM microprocessor supports higher layer applications. Further bifurcation may be based on voice applications, data applications, and/or RF control. The RF section converts an inbound RF voice signal into the inbound voice symbol stream, converts the outbound voice symbol stream into an outbound RF voice signal, converts an inbound RF data signal into the inbound data symbol stream, and converts the outbound data symbol stream into an outbound RF data signal. The interface module provides coupling between the processing module, the RF section, and with off-chip circuits.
摘要:
A wireless terminal is operable to receive a Wideband Code Division Multiple Access (WCDMA) signal from a base station and includes clock circuitry, a wireless interface, and a Primary Synchronization (PSYNC) module. The clock circuitry generates a wireless terminal clock using a wireless terminal oscillator. The wireless interface receives the WCDMA signal, which is produced by the base station using a base station clock that is produced using a base station oscillator that is more accurate than the wireless terminal oscillator. The PSYNC module includes a plurality of PSYNC correlation branches. Each PSYNC correlation branch phase rotates the WCDMA signal based upon a respective frequency offset, correlates the phase rotated WCDMA signal with a Primary Synchronization Channel (PSCH) code over a plurality of sampling positions, and produces PSYNC correlation energies based upon the correlations for each of the plurality of sampling positions.
摘要:
A Radio Frequency (RF) receiver includes a RF front end and a baseband processing module coupled to the RF front end that is operable to receive a time domain signal that includes time domain training symbols and time domain data symbols. The baseband processing module includes a channel estimator operable to process the time domain training symbols to produce a time domain channel estimate, a Fast Fourier Transformer operable to convert the time domain channel estimate to the frequency domain to produce a frequency domain channel estimate, a weight calculator operable to produce frequency domain equalizer coefficients based upon the frequency domain channel estimate, an Inverse Fast Fourier Transformer operable to converting the frequency domain equalizer coefficients to the time domain to produce time domain equalizer coefficients, and an equalizer operable to equalize the time domain data symbols using the time domain equalizer coefficients.
摘要:
An on-chip baseband-to-RF interface includes a receive/transmit section, a control section, and a clock section. The receive/transmit section, when in a receive mode, provides the stream of inbound symbols from the RF circuit to the baseband processing module and, when in a transmit mode, provides the stream of outbound symbols from the baseband processing module to the RF circuit. The control section provides a control communication path between the baseband processing module and the RF circuit. The clock section provides a clock communication path between the baseband processing module and the RF circuit.