Abstract:
An organic light emitting display (OLED) panel has a plurality of organic light emitting diodes. The organic light emitting diodes are electrically connected to a plurality of segment lines and a plurality of common lines in a matrix structure. The organic light emitting diodes electrically connected to the same common lines are divided into a first group and a second group. Driving currents are separately supplied to the organic light emitting diodes of the first group and the second group according to a first pulse width modulation (PWM) manner and a second PWM manner. The first PWM manner and the second PWM manner have complementary waveforms in a period.
Abstract:
A method for accessing a single port memory is provided. A single port memory is used as a line buffer and divided into a plurality of memory blocks. The line buffer data is written into or read out from these memory blocks by turns with a special sequence corresponding to the operation mode; for example, a normal mode or a PLM mode. Therefore, the line buffer data can be written into or read out from the line buffer at the same time, and the size and cost of integrated circuit can be reduced.
Abstract:
A current driving apparatus and method using a pulse width modulation (PWM) technique to display a desired gray level for passive matrix organic light emitting diode (PMOLED) display applications is disclosed. The current driving circuit includes a memory, a logic and a segment driver. The memory stores a desired gray level, the logic comprises a counter and provides a predetermined bias time, and the segment driver provides a constant current to the PMOLED display based on the desired gray level and the predetermined bias time. The segment driver provides a constant current to the PMOLED display until the counter value reaches the desired gray level, and the counter is first counted zero for the predetermined bias time and then increments by one for every other cycle.
Abstract:
A DAC has an N-bit R-string DAC section and an (M-N)-bit interpolation DAC section. The N-bit R-string DAC section has a plurality of resistors and a 2-of-N selector. The resistors are electrically connected in series to provide a plurality of voltage levels. The 2-of-N selector is coupled to the series-connected resistors, and is arranged to select two neighboring voltage levels according to an N-bit MSB subword. The (M-N)-bit interpolation DAC section is coupled to the N-bit R-string DAC section, and is arranged to interpolate an analog output signal from the two neighboring voltage levels according to an (M-N)-bit LSB subword.
Abstract:
Successive video signals of a first frame and a second frame are received. A signal difference between the video signals is determined and filtered to obtain a luminance difference. A signal sum of the video signals is determined and filtered to obtain a luminance sum. The luminance sum is subtracted from the signal sum to obtain a chrominance difference.
Abstract:
The present invention discloses a shift register circuit, comprising a plurality of shift register units and a switching circuit. The shift register units are electrically connected in series. The switching circuit electrically connects to the shift register units to divide the shift register units into a first group of shift register units and a second group of shift register units. In the shift register circuit of the present invention, the switching circuit electrically connects the first and the second group of shift register units or electrically disconnects the first group of shift register units from the second group of shift register units according to at least one control signal.
Abstract:
A circuit and a method for eliminating interference introduced from an image channel into a desired channel is described. The circuit includes a splitter and an adder. The splitter generates signals split from a received signal having frequency components within the desired and image channel. The adder adds together the signals output from the splitter. The circuit can be used in an TV tuner.
Abstract:
A liquid crystal display is disclosed, which includes a panel having an array of pixels, a timing controller outputting image data and source control signals, a series of source drivers and a gate driver. One of the source drivers is selected to generate gate control signals by reference to at least one of the source control signals and transmitted to the gate driver. Thus, the gate driver along with the source drivers can drive the panel pixels.
Abstract:
A method for writing data into the memory, especially a method of preventing the data from overwriting for the write operation, is disclosed. The invention provides a control device for a memory system, which utilizes at least two layers of latches to hold the inputted data from a data bus and the data which prepares to be written into memory respectively. According to the control of communication between two layers of latches by the control device, the new inputted data of the succeeding write operation will not overwrite the data of the current write operation, thereby reducing the limitation for the cycle of writing (CYCW) and increasing the write speed.
Abstract:
A method for driving a dark ring of a liquid-crystal-on-silicon (LCOS) display is provided to prevent the fringe effect (bright lines) due to the constant voltage difference between the dark ring and the adjoining pixels within the LCOS display. A dark ring is divided into a plurality of portions. The polarity of each portion is controlled in accordance with the polarity of the adjoining pixels within the LCOS display and the scan direction of gate drivers such that the polarity inversion for each portion will coincide with that for the adjoining pixels within the LCOS display so as to avoid the fringe effect (bright lines).