Image rejection calibration with a passive network

    公开(公告)号:US10469295B2

    公开(公告)日:2019-11-05

    申请号:US15798590

    申请日:2017-10-31

    摘要: In one aspect, an apparatus includes: a mixer to receive a radio frequency (RF) signal and downconvert the RF signal into a second frequency signal; an amplifier coupled to the mixer to amplify the second frequency signal; an image rejection (IR) circuit coupled to the programmable gain amplifier (PGA) to orthogonally correct a gain and a phase of the amplified second frequency signal to output a corrected amplified second frequency signal; and a complex filter to filter the corrected amplified second frequency signal.

    MIMO decoding based on quadrant identification

    公开(公告)号:US10432446B1

    公开(公告)日:2019-10-01

    申请号:US16122349

    申请日:2018-09-05

    申请人: NXP USA, INC.

    摘要: A decoder decodes a set of data streams received at a receiver based on a tree search that employs a subset of decoding constellation points. The decoder can form a tree wherein each level of the tree corresponds to one of the set of data streams. Each level of the tree includes a plurality of nodes corresponding to a set of candidate constellation points, wherein the set of candidate constellation points indicating possible values of data received via the set of data streams. For tree levels beyond an initial tree level, the decoder expands each node (that is, calculates the metrics for nodes of the next tree level) for only a subset of candidate constellation points, wherein the subset of candidate constellation points is based on a sign value of the node.

    Digital signal processing circuit and optical space communication system

    公开(公告)号:US10432318B2

    公开(公告)日:2019-10-01

    申请号:US16066854

    申请日:2017-01-10

    申请人: NEC CORPORATION

    摘要: In order to increase a compensation range for Doppler shift compensation, this digital signal processing circuit is provided with a Doppler shift compensation unit which, on the basis of a sample sequence signal which is oversampled at N (where N is an integer at least equal to 2) times a symbol rate and includes a central sample corresponding to the timing at a symbol center, and a transition sample corresponding to the timing of a symbol transition, finds a Doppler shift amount included in the sample sequence signal and performs Doppler shift compensation. The Doppler shift compensation unit includes a symbol determining unit which performs a symbol determination with respect to the central sample and a determination with respect to the transition sample. The Doppler shift compensation unit switches between these determinations for each corresponding sample and performs said determinations in order to obtain a phase difference and thereby detect the Doppler shift amount.

    WAKE UP RECEIVER TRANSMIT WAVEFORM
    65.
    发明申请

    公开(公告)号:US20190281548A1

    公开(公告)日:2019-09-12

    申请号:US16422091

    申请日:2019-05-24

    IPC分类号: H04W52/02 H04L27/06

    摘要: This disclosure describes systems, methods, and devices related to generating a wake up receiver (WUR) transmit waveform. A device may determine one or more symbols bit sequence of a wake up receiver (WUR) frame to be sent to a first station device capable of decoding the bit sequence. The device may determine a first symbol of the one or more symbols, wherein the first symbol is associated with an ON state. The device may determine a second symbol of the one or more symbols, wherein the second symbol is associated with the ON state. The device may generate a first on-off keying (OOK) waveform associated with the first symbol. The device may generate a second OOK waveform associated with the second symbol, wherein the second OOK waveform is different from the first OOK waveform. The device may cause to send the WUR frame to the first station device based on the first OOK waveform and the second OOK waveform.

    Jitter reduction techniques when using digital PLLs with ADCs and DACs

    公开(公告)号:US10367516B2

    公开(公告)日:2019-07-30

    申请号:US15674985

    申请日:2017-08-11

    摘要: This disclosure relates to data converters for electronic systems. An example system includes a primary analog to digital converter (ADC) circuit, a slope calculation circuit, a digital phase lock loop (DPLL) circuit, a sampling error circuit, and a summing circuit. The primary ADC circuit samples an input signal and produces a digital output signal representative of the input signal. The slope calculation circuit generates a digital slope signal representative of slope of the input signal, and the DPLL circuit provides a sampling clock signal to the primary ADC circuit. The sampling error circuit generates a sampling error signal representative of sampling error by the primary ADC circuit using the digital slope signal and the sampling clock signal. The summing circuit receives the sampling error signal and the digital output signal of the primary ADC circuit and generates an adjusted digital output signal representative of the input signal.

    Infrared remote control apparatus and terminal

    公开(公告)号:US10339798B2

    公开(公告)日:2019-07-02

    申请号:US15857719

    申请日:2017-12-29

    摘要: Embodiments of the present disclosure provide an infrared remote control apparatus and a terminal. The infrared remote control apparatus includes an audio codec chip, a transfer switch, and an infrared transmitter. The audio codec chip includes a pair of differential output pins. The infrared transmitter is connected to the differential output pins by using the transfer switch. The audio codec chip is configured to obtain an infrared remote control parameter that includes an envelope length and a carrier frequency of an infrared remote control signal. An infrared remote control signal is generated according to the envelope length and the carrier frequency. When the transfer switch sets up a connection between the infrared transmitter and the differential output pins, the audio code chip is configured to drive, by using the differential output pins, the infrared transmitter to transmit the infrared remote control signal.