公开(公告)号：US5629241A

公开(公告)日：1997-05-13

申请号：US499800

申请日：1995-07-07

Applicant: Mehran Matloubian ,  Perry A. Macdonald ,  David B. Rensch ,  Lawrence E. Larson

Inventor： Mehran Matloubian ,  Perry A. Macdonald ,  David B. Rensch ,  Lawrence E. Larson

IPC: H01L21/60 ,  H01L23/66 ,  H01P3/08 ,  H01Q23/00 ,  H05K1/02 ,  H05K3/34

CPC classification number: H01L25/162 ,  H01L23/66 ,  H01L24/81 ,  H01Q23/00 ,  H05K3/3452 ,  H01L2223/6677 ,  H01L2224/13111 ,  H01L2224/16 ,  H01L2224/81801 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01068 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/1305 ,  H01L2924/13064 ,  H01L2924/14 ,  H01L2924/1423 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H05K1/0237 ,  H05K2201/0175 ,  H05K2203/0315

Abstract: A microwave/millimeter wave circuit structure supports discrete circuit elements by flip-chip mounting to an interconnection network on a low cost non-ceramic and non-semiconductor dielectric substrate, preferably Duroid. The necessary precise alignment of the circuit elements with contact pads on the substrate network required for the high operating frequencies is facilitated by oxidizing the interconnection network, but providing the contact pads from a non-oxidizable material to establish a preferential solder bump wetting for the pads. Alternately, the contact bumps on the flip-chips can be precisely positioned through corresponding openings in a passivation layer over the interconnection network. For thin circuit substrates that are too soft for successful flip-chip mounting, stiffening substrates are laminated to the circuit substrates. In a self-contained antenna application in which two of the circuit substrates are laminated together, with an antenna on one side and circuitry on the other side, a metallic ground plane between the substrates also serves a stiffening function.

Abstract translation: 微波/毫米波电路结构通过倒装芯片安装到低成本非陶瓷和非半导体电介质基底（优选为Duroid）上的互连网络来支持分立电路元件。 通过氧化互连网络来提供电路元件与高工作频率所需的基板网络上的接触焊盘的必要精确对准，但是提供来自不可氧化材料的接触焊盘以建立用于焊盘的优先焊料凸块润湿 。 或者，倒装芯片上的接触凸块可以通过互连网络上的钝化层中的相应开口精确定位。 对于对于成功倒装芯片安装来说太软的薄电路基板，加固基板被层压到电路基板上。 在其中两个电路基板层叠在一起的独立天线应用中，一侧的天线和另一侧的电路，在基板之间的金属接地平面也起增强作用。

公开(公告)号：US5603765A

公开(公告)日：1997-02-18

申请号：US507744

申请日：1995-04-21

Applicant: Mehran Matloubian ,  Linda M. Jelloian ,  Mark Lui ,  Takyiu Liu

Inventor： Mehran Matloubian ,  Linda M. Jelloian ,  Mark Lui ,  Takyiu Liu

IPC: H01L21/203 ,  H01L21/285 ,  H01L21/335 ,  H01L21/20

CPC classification number: H01L29/66462 ,  H01L21/02392 ,  H01L21/02463 ,  H01L21/02505 ,  H01L21/02543 ,  H01L21/02546 ,  H01L21/0262 ,  H01L21/02631 ,  H01L21/28587

Abstract: High breakdown voltages for AlInAs layers in InP-based devices, such as a gate layer in an InP HEMT or a collector layer in a heterojunction bipolar transistor, are achieved by growing the AlInAs layer by MBE at a substrate temperature about 70.degree.-125.degree. C. below the temperature at which a 2.times.4 reflective high energy diffraction pattern is observed. This corresponds to a growth temperature range of about 415.degree.-470.degree. C. for a 540.degree. 2.times.4 reconstruction temperature. Preferred growth temperatures within these ranges are 80.degree. C. below the 2.times.4 reconstruction temperature, or about 460.degree. C. Higher breakdown voltages are obtained than when the AlInAs layer is grown at either higher or lower temperatures.

Abstract translation: 在基于InP的器件中的AlInAs层的高击穿电压，例如InP HEMT中的栅极层或异质结双极晶体管中的集电极层，是通过在衬底温度约70°-125°下通过MBE生长AlInAs层来实现的 低于观察到2x4反射性高能衍射图案的温度。 这对应于在540°2×4重建温度下约415°-470℃的生长温度范围。 这些范围内的优选生长温度低于2x4重建温度或约460℃以下的80℃。获得比在更高或更低温度下生长AlInAs层的更高的击穿电压。

公开(公告)号：US5548140A

公开(公告)日：1996-08-20

申请号：US466156

申请日：1995-06-06

Applicant: Chanh Nguyen ,  Takyiu Liu ,  Mehran Matloubian

Inventor： Chanh Nguyen ,  Takyiu Liu ,  Mehran Matloubian

IPC: H01L21/335 ,  H01L29/201 ,  H01L29/205 ,  H01L29/778 ,  H01L31/0328 ,  H01L29/06

CPC classification number: H01L29/66462 ,  H01L29/201 ,  H01L29/205 ,  H01L29/7783

Abstract: An epitaxial structure and method of manufacture for a field-effect transistor capable of high-speed low-noise microwave, submillimeterwave and millimeterwave applications. Preferably, the epitaxial structure includes a donor layer and/or buffer layer made from a semiconductor material having the formula AlP.sub.0.39+y Sb.sub.0.61-y.

Abstract translation: 一种能够实现高速低噪声微波，亚毫米波和毫米波应用的场效应晶体管的外延结构和制造方法。 优选地，外延结构包括由具有式AlP0.39 + ySb0.61-y的半导体材料制成的施主层和/或缓冲层。