公开(公告)号：US20120004452A1

公开(公告)日：2012-01-05

申请号：US13154807

申请日：2011-06-07

Applicant: Mukesh Kumar MADHRA ,  Pankaj Kumar Singh ,  Chandra Has Khanduri

Inventor： Mukesh Kumar MADHRA ,  Pankaj Kumar Singh ,  Chandra Has Khanduri

IPC: C07C229/36 ,  C07C237/20

CPC classification number: C07C229/22 ,  C07B2200/07 ,  C07C231/14 ,  C07C237/06 ,  C07C237/22

Abstract: The present invention is concerned with novel compounds and their use for the preparation of lacosamide. The present invention also contemplates processes for the preparation of lacosamide employing the novel compound of general Formula II, Formula IIa or Formula IIb as intermediate. Wherein R1 is —OH or —OMe; R2 is —OH or —NH—CH2—C6H5.

公开(公告)号：US20110102048A1

公开(公告)日：2011-05-05

申请号：US12889440

申请日：2010-09-24

Applicant: Pankaj Kumar ,  Pramod Elamannu Parameswaran ,  Makeshwar Kothandaraman ,  Vani Deshpande ,  John Kriz

Inventor： Pankaj Kumar ,  Pramod Elamannu Parameswaran ,  Makeshwar Kothandaraman ,  Vani Deshpande ,  John Kriz

IPC: H03L5/00

CPC classification number: H03K19/00315

Abstract: A method includes controllably generating a first bias voltage from a supply voltage to be within an upper tolerable limit of an operating voltage of one or more constituent active circuit element(s) of an Input/Output (IO) core device of an integrated circuit (IC) to be interfaced with an IO pad, and controllably generating a second bias voltage from an external voltage supplied through the IO pad to be within the upper tolerable limit of the operating voltage of the one or more constituent active circuit element(s) of the IO core device to be interfaced with the IO pad. The method also includes controllably utilizing a control signal generated by the IO core to derive an output bias voltage from the first bias voltage during a driver mode of operation or the second bias voltage during a failsafe mode of operation and a tolerant mode of operation.

Abstract translation: 一种方法包括可控制地从电源电压产生第一偏置电压，使其处于集成电路的输入/输出（IO）核心器件的一个或多个构成的有源电路元件的工作电压的上容许限度内（ IC）与IO焊盘接口，并且可控制地从通过IO焊盘提供的外部电压产生第二偏置电压，使其在所述一个或多个构成的有源电路元件的工作电压的上容许限度内 要与IO接口连接的IO内核设备。 该方法还包括可控制地利用由IO核心产生的控制信号，以在驱动器操作模式期间从第一偏置电压导出输出偏置电压，或者在故障安全操作模式和容限操作模式期间导出第二偏置电压。

公开(公告)号：US07876132B1

公开(公告)日：2011-01-25

申请号：US12580280

申请日：2009-10-16

Applicant: Pankaj Kumar ,  Pramod Elamannu Parameswaran ,  Makeshwar Kothandaraman ,  Vani Deshpande ,  John Kriz

Inventor： Pankaj Kumar ,  Pramod Elamannu Parameswaran ,  Makeshwar Kothandaraman ,  Vani Deshpande ,  John Kriz

IPC: H03B1/00

CPC classification number: H03K17/08104 ,  H03K17/063 ,  H03K19/00315 ,  H03K2217/0018

Abstract: A circuit includes a first comparator block configured to output a voltage equal to a higher of a supply voltage and a bias voltage, a second comparator block configured to output a voltage equal to a higher of the bias voltage and an external voltage supplied through an Input/Output (IO) pad, and a third comparator block configured to output a voltage equal to a higher of the output of the first comparator block and the output of the second comparator block. A voltage across one or more constituent active element(s) of each of the first comparator block, the second comparator block, and the third comparator block is within an upper tolerable limit thereof during each of a normal operation, a failsafe operation, and a tolerant operation.

Abstract translation: 电路包括：第一比较器块，被配置为输出等于较高的电源电压和偏置电压的电压;第二比较器块，被配置为输出等于较高偏置电压的电压和通过输入提供的外部电压 /输出（IO）焊盘和第三比较器块，其被配置为输出等于第一比较器块的输出的较高的电压和第二比较器块的输出。 第一比较器块，第二比较器块和第三比较器块中的每个的一个或多个构成有源元件上的电压在正常操作，故障安全操作和 容忍操作。

公开(公告)号：US20100236248A1

公开(公告)日：2010-09-23

申请号：US12406657

申请日：2009-03-18

Applicant: Karthick Kaleeswaran ,  Ganesh Pejawar Rao ,  Pankaj Kumar Jha

Inventor： Karthick Kaleeswaran ,  Ganesh Pejawar Rao ,  Pankaj Kumar Jha

IPC: F02C1/00

CPC classification number: F23R3/06 ,  F23R2900/00005

Abstract: A combustor liner for a gas turbine combustor includes a cooling hole formed in the liner that delivers cooling air into a combustion zone of the combustor. A stub is secured in the cooling hole and is structured to provide added stiffness to an inside edge of the cooling hole. The added stiffness reduces cracking caused by thermal fatigue and provides resistance against high cycle fatigue failures at high frequencies.

Abstract translation: 用于燃气轮机燃烧器的燃烧器衬套包括形成在衬套中的冷却孔，其将冷却空气输送到燃烧器的燃烧区。 短管被固定在冷却孔中并被构造成为冷却孔的内边缘提供附加的刚性。 增加的刚度可减少由热疲劳引起的裂纹，并提供高频时高循环疲劳失效的阻力。

公开(公告)号：US20100164591A1

公开(公告)日：2010-07-01

申请号：US12346900

申请日：2008-12-31

Applicant: Pankaj Kumar ,  Pramod Elamannu Parameswaran ,  Anuroop Iyengar ,  Vani Deshpande

Inventor： Pankaj Kumar ,  Pramod Elamannu Parameswaran ,  Anuroop Iyengar ,  Vani Deshpande

IPC: H03L5/00

CPC classification number: H03K17/223

Abstract: A power detect system and circuit for detecting a voltage level of an input/output supply voltage (VDDIO) in a circuit of low voltage devices is disclosed. In one embodiment, the power detect system and circuit includes a voltage divider coupled between the VDDIO and a negative supply voltage (VSS) for generating a bias voltage, a first inverter coupled between a core voltage (VDD) and the VSS for generating a first node voltage based on the bias voltage, a native device coupled between the VDDIO and the VSS for generating a second node voltage based on the bias voltage, and a switch coupled between the first inverter and the native device for controlling the second node voltage based on the first node voltage. The power detect system further includes a second inverter coupled between the VDD and the VSS for generating an output voltage based on the second node voltage.

Abstract translation: 公开了一种用于检测低压器件的电路中的输入/输出电源电压（VDDIO）的电压电平的功率检测系统和电路。 在一个实施例中，功率检测系统和电路包括耦合在VDDIO和用于产生偏置电压的负电源电压（VSS）之间的分压器，耦合在核心电压（VDD）和VSS之间的第一反相器，用于产生第一 基于所述偏置电压的节点电压，耦合在所述VDDIO和所述VSS之间以产生基于所述偏置电压的第二节点电压的本机装置，以及耦合在所述第一反相器和所述本机装置之间的开关，用于基于 第一节点电压。 功率检测系统还包括耦合在VDD和VSS之间的第二反相器，用于基于第二节点电压产生输出电压。

公开(公告)号：US20100141334A1

公开(公告)日：2010-06-10

申请号：US12330828

申请日：2008-12-09

Applicant: Pankaj Kumar ,  Makeshwar Kothandaraman ,  Dipankar Bhattacharya ,  John Kriz ,  Jeffrey J. Nagy ,  Pramod Elamannu Parameswaran

Inventor： Pankaj Kumar ,  Makeshwar Kothandaraman ,  Dipankar Bhattacharya ,  John Kriz ,  Jeffrey J. Nagy ,  Pramod Elamannu Parameswaran

IPC: G05F1/10

CPC classification number: G05F3/16

Abstract: Disclosed is a bias circuit with a first resistor connected between the supply voltage and a feedback node. Resistors are connected in series between the feedback node and the reference supply voltage. The connections between the resistors define at least one bias voltage. A second resistor is connected between the feedback node and a first drain node. A first field-effect transistor has a first gate node, the first drain node, and a first source node. The gate node is connected to the first supply voltage. A second field-effect transistor has a second gate node, a second drain node, and a second source node. The second drain node is connected to the first source node. The second gate node is connected to the bias voltage. The second source node is connected to an output signal node. The output signal node capable of experiencing an overshoot voltage.

Abstract translation: 公开了一种偏置电路，其中第一电阻器连接在电源电压和反馈节点之间。 电阻器连接在反馈节点和参考电源电压之间。 电阻之间的连接限定了至少一个偏置电压。 第二电阻器连接在反馈节点和第一漏极节点之间。 第一场效应晶体管具有第一栅极节点，第一漏极节点和第一源节点。 门节点连接到第一电源电压。 第二场效应晶体管具有第二栅极节点，第二漏极节点和第二源节点。 第二排水节点连接到第一源节点。 第二栅极节点连接到偏置电压。 第二源节点连接到输出信号节点。 输出信号节点能够经历过冲电压。

公开(公告)号：US20100033214A1

公开(公告)日：2010-02-11

申请号：US12188227

申请日：2008-08-08

Applicant: Vani Deshpande ,  Anuroop Iyengar ,  Pramod Elamannu Parameswaran ,  Pankaj Kumar

Inventor： Vani Deshpande ,  Anuroop Iyengar ,  Pramod Elamannu Parameswaran ,  Pankaj Kumar

IPC: H03K5/24

CPC classification number: H03K5/2481 ,  H03K3/3565

Abstract: A high voltage input receiver with hysteresis using low voltage transistors is disclosed. In one embodiment, an input receiver circuit includes a hysteresis comparator circuit, based on a plurality of low voltage transistors, for generating a first output voltage by comparing an external voltage and a reference voltage and a stress protection circuit for preventing the plurality of low voltage transistors of the hysteresis comparator circuit from exceeding their reliability limits. In addition, the reference voltage is used to set a positive trip point and a negative trip point. Moreover, the input receiver circuit includes a source follower circuit for transferring the first output voltage to an output node of the source follower circuit from a voltage level of a VDDIO to a voltage level of a VDD.

Abstract translation: 公开了一种使用低压晶体管的具有滞后的高压输入接收器。 在一个实施例中，输入接收器电路包括基于多个低压晶体管的滞后比较器电路，用于通过比较外部电压和参考电压产生第一输出电压，以及用于防止多个低电压的应力保护电路 迟滞比较器电路的晶体管超过其可靠性限制。 此外，参考电压用于设置正跳变点和负跳变点。 此外，输入接收器电路包括源极跟随器电路，用于将源极跟随器电路的输出节点的第一输出电压从VDDIO的电压电平转换到VDD的电压电平。

公开(公告)号：US20090143472A1

公开(公告)日：2009-06-04

申请号：US12327124

申请日：2008-12-03

Applicant: Mukesh Kumar Madhra ,  Pankaj Kumar Singh ,  Chandra Has Khanduri

Inventor： Mukesh Kumar Madhra ,  Pankaj Kumar Singh ,  Chandra Has Khanduri

IPC: A61K31/165 ,  C07C237/04 ,  C07C237/14

CPC classification number: C07C229/22 ,  C07B2200/07 ,  C07C231/14 ,  C07C237/06 ,  C07C237/22

Abstract: The present invention is concerned with novel compounds and their use for the preparation of lacosamide. The present invention also contemplates processes for the preparation of lacosamide employing the novel compound of general Formula II, Formula IIa or Formula IIb as intermediate. Wherein R1 is —OH or —OMe; R2 is —OH or —NH—CH2—C6H5.

Abstract translation: 本发明涉及新化合物及其用于制备lacosamide的用途。 本发明还考虑了使用通式II，式IIa或式IIb的新化合物作为中间体来制备lacosamide的方法。 其中R1是-OH或-OMe; R2是-OH或-NH-CH2-C6H5。

公开(公告)号：US07081897B2

公开(公告)日：2006-07-25

申请号：US10745824

申请日：2003-12-24

Applicant: Pankaj Kumar Garg

Inventor： Pankaj Kumar Garg

IPC: G06F12/02 ,  G11C5/14

CPC classification number: G06F12/0223 ,  G06F1/3203 ,  G06F1/3275 ,  G06F12/06 ,  G09G5/363 ,  G09G2330/021 ,  G09G2360/125 ,  Y02D10/13 ,  Y02D10/14 ,  Y02D50/20

Abstract: Positioning a block of graphics memory within a memory system so as to minimize the number of memory devices and/or banks of memory within memory devices occupied by the block of graphics memory so as to maximize the number of memory devices and/or banks of memory within memory devices that are not occupied by even a portion of the block of graphics memory, and thereby, maximize the number of memory devices and/or banks of memory within memory devices that may be placed into a lower power state without causing the block of graphics memory to become inaccessible so as to impair reading out graphics data to support refreshing an image on a display device.

Abstract translation: 将一块图形存储器定位在存储器系统内，以便最小化由图形存储器块占用的存储器件内的存储器件和/或存储器组的数量，以便最大化存储器件和/或存储器组的数量 在图形存储器块的甚至一部分没有占用的存储器件内，从而最大限度地增加可能被置于低功率状态的存储器设备内存储器的数量，而不会导致块 图形存储器变得不可访问，以便削弱读出图形数据以支持在显示设备上刷新图像。

公开(公告)号：US06548459B2

公开(公告)日：2003-04-15

申请号：US10113285

申请日：2002-04-02

Applicant: Pankaj Kumar Mondal ,  Khem Chand Dohhen ,  Rakesh Sarin ,  Deepak Kumar Tuli ,  Niranjan Raghunath Raje ,  Akhilesh Kumar Bhatnagar

Inventor： Pankaj Kumar Mondal ,  Khem Chand Dohhen ,  Rakesh Sarin ,  Deepak Kumar Tuli ,  Niranjan Raghunath Raje ,  Akhilesh Kumar Bhatnagar

IPC: C10M12900

CPC classification number: C10M141/08 ,  C10M129/44 ,  C10M2207/128 ,  C10M2219/022 ,  C10N2220/10 ,  C10N2230/12 ,  C10N2260/02

Abstract: A process for the preparation of CNSL phenoxy carboxylic acid derivatives for use as an additive in a lubricant composition so as to impart improved rust inhibiting properties, including the steps of (a) partially hydrogenating distilled technical cashew nut shell liquid with palladium or nickel or platinum catalyst; to hydrogenate the olefinic chain; (b) reacting cashew nut shell liquid or partially hydrogenated technical cashew nut shell liquid with halogeno carboxylic acid derivatives to obtain unpolymerized cashew nut shell liquid phenoxy carboxylic acid derivatives, the reaction being carried out at a temperature ranging from 20 to 140° C. A lubricant containing a major proportion of a material selected from the group consisting of an oil of lubricating viscosity and a grease; and remainder an additive including CNSL phenoxy carboxylic acid derivative prepared by the foregoing process.

Abstract translation: 一种制备用于润滑剂组合物中的添加剂的CNSL苯氧基羧酸衍生物的方法，以提供改善的防锈性能，包括以下步骤：（a）用钯或镍或铂部分氢化蒸馏的技术腰果壳液体 催化剂; 氢化烯烃链; （b）使腰果壳液体或部分氢化的技术腰果壳液与卤代羧酸衍生物反应，得到未聚合的腰果壳液体苯氧基羧酸衍生物，反应在20-140℃的温度下进行。 含有大部分选自润滑粘度的油和润滑脂的材料的润滑剂; 其余为包括通过上述方法制备的CNSL苯氧基羧酸衍生物的添加剂。