公开(公告)号：US20200029433A1

公开(公告)日：2020-01-23

申请号：US16121645

申请日：2018-09-05

Applicant: Unimicron Technology Corp.

Inventor： Chien-Chen LIN ,  Kuan-Wen FONG

IPC: H05K1/11 ,  H01L21/48 ,  H01L23/498 ,  H05K3/46 ,  H05K3/40

Abstract: A substrate structure includes a first circuit structure, a second dielectric layer, and a second circuit structure. The first circuit structure includes a first layer and a second layer. The first layer includes a first dielectric layer and a first circuit layer embedded in the first dielectric layer. The second layer is disposed below the first layer and includes a second circuit layer electrically connected to the first circuit layer. The second dielectric layer is disposed on the first circuit structure and has a first opening exposing a portion of the first circuit layer. The melting point of the second dielectric layer is lower than that of the first dielectric layer. The second circuit structure is disposed on the second dielectric layer and has a second opening connected to the first opening. The second circuit structure includes a third circuit layer electrically connected to the first circuit layer.

公开(公告)号：US20200006906A1

公开(公告)日：2020-01-02

申请号：US16055160

申请日：2018-08-06

Applicant: Unimicron Technology Corp.

Inventor： Yu-Hsiang Chuang ,  Guodong Li ,  He Lei ,  Jianyu Zhang

IPC: H01R43/00 ,  H01R12/55

Abstract: A manufacturing method of connector structure including the following steps is provided. First, providing a dielectric layer having. Then, forming a first adhesive layer and a second adhesive layer on two opposite sides of the dielectric layer respectively. Then, providing at least one first conductive elastic cantilever and at least one second conductive elastic cantilever, wherein the first conductive elastic cantilever comprises a first fixing end portion and a first free end portion, and the second conductive elastic cantilever comprises a second fixing end portion and a second free end portion. Then, fixing the first fixing end portion and the second fixing end portion to the first adhesive layer and the second adhesive layer respectively, wherein the first fixing end portion is aligned with the second fixing end portion. Afterward, forming at least one conductive via for electrically connecting the first conductive elastic cantilever with the second conductive elastic cantilever.

公开(公告)号：US10515870B1

公开(公告)日：2019-12-24

申请号：US16029659

申请日：2018-07-09

Applicant: Unimicron Technology Corp.

Inventor： Chin-Sheng Wang ,  Pei-Chang Huang ,  Ra-Min Tain

IPC: H01L23/367 ,  H01L23/467 ,  H01L23/498

Abstract: A package carrier includes a multilayer circuit structure, at least one gas-permeable structure, a first outer circuit layer, a second outer circuit layer, a first solder mask and a second solder mask. The multilayer circuit structure has an upper surface and a lower surface opposite to each other and a plurality of through holes. The gas-permeable structure is in the form of a mesh and disposed in at least one of the through holes. The first and the second outer circuit layers respectively at least cover the upper and the lower surfaces. At least one first opening of the first solder mask exposes a portion of the first outer circuit layer and is disposed corresponding to the gas-permeable structure. At least one second opening of the second solder mask exposes a portion of the second outer circuit layer and is disposed corresponding to the gas-permeable structure.

公开(公告)号：US20190373737A1

公开(公告)日：2019-12-05

申请号：US16543646

申请日：2019-08-19

Applicant: Unimicron Technology Corp.

Inventor： Po-Hsuan LIAO

IPC: H05K3/10 ,  H05K1/02 ,  H05K3/46 ,  H05K1/11

Abstract: A method for manufacturing a circuit board includes forming a patterned first dielectric layer on a substrate; forming a first adhesive layer on the patterned first dielectric layer; forming a second dielectric layer on the first adhesive layer; patterning the second dielectric layer to expose a portion of a top surface of the first adhesive layer opposite to the substrate; and filling at least the patterned second dielectric layer with a conductive material, such that the conductive material is in contact with the top surface of the first adhesive layer.

公开(公告)号：US20190373713A1

公开(公告)日：2019-12-05

申请号：US16543609

申请日：2019-08-18

Applicant: Unimicron Technology Corp.

Inventor： Tzyy-Jang TSENG ,  Kai-Ming YANG ,  Pu-Ju LIN ,  Cheng-Ta KO ,  Yu-Hua CHEN

IPC: H05K1/02 ,  H05K1/11

Abstract: A stacked structure includes a circuit board, an electronic component, metallic cores, and insulating cladding layers. The circuit board includes first bonding pads. The electronic component includes second bonding pads that are opposite to the first bonding pads. Each metallic core is connected to a corresponding first bonding pad and a corresponding second bonding pad. The metallic cores have a curved surface interposed between the corresponding first bonding pad and the corresponding second bonding pad. The insulating cladding layers are separated from each other and cover the curved surfaces of the metallic cores.

公开(公告)号：US20190371704A1

公开(公告)日：2019-12-05

申请号：US16029659

申请日：2018-07-09

Applicant: Unimicron Technology Corp.

Inventor： Chin-Sheng Wang ,  Pei-Chang Huang ,  Ra-Min Tain

IPC: H01L23/467 ,  H01L23/498 ,  H01L23/367

Abstract: A package carrier includes a multilayer circuit structure, at least one gas-permeable structure, a first outer circuit layer, a second outer circuit layer, a first solder mask and a second solder mask. The multilayer circuit structure has an upper surface and a lower surface opposite to each other and a plurality of through holes. The gas-permeable structure is in the form of a mesh and disposed in at least one of the through holes. The first and the second outer circuit layers respectively at least cover the upper and the lower surfaces. At least one first opening of the first solder mask exposes a portion of the first outer circuit layer and is disposed corresponding to the gas-permeable structure. At least one second opening of the second solder mask exposes a portion of the second outer circuit layer and is disposed corresponding to the gas-peiuieable structure.

公开(公告)号：US10433426B2

公开(公告)日：2019-10-01

申请号：US15836941

申请日：2017-12-11

Applicant: Unimicron Technology Corp.

Inventor： Po-Hsuan Liao

IPC: H05K1/02 ,  H05K1/11 ,  H05K3/10 ,  H05K3/00 ,  H05K3/46

Abstract: A circuit board includes a substrate, a first dielectric layer, an adhesive layer, a second dielectric layer, and a first conductive line. The first dielectric layer is disposed on the substrate. The adhesive layer is bonded to the first dielectric layer and has a top surface opposite to the substrate. The second dielectric layer is disposed on the adhesive layer and has at least one first through hole. The first conductive line is located in the first through hole of the second dielectric layer and is in contact with the top surface of the adhesive layer.

公开(公告)号：US10383226B2

公开(公告)日：2019-08-13

申请号：US15836923

申请日：2017-12-11

Applicant: Unimicron Technology Corp.

Inventor： Chang-Fu Chen ,  Chun-Hao Chen

IPC: H05K3/46 ,  H05K1/11 ,  H05K3/42 ,  H05K3/00

Abstract: A multi-layer circuit structure including a core layer, a first circuit structure, a second circuit structure, and a build-up circuit structure is provided. The first circuit structure and the second circuit structure are respectively disposed on two opposite surfaces of the core layer. The build-up circuit structure includes a first dielectric layer disposed on the first circuit structure, first conductive blind holes, a second dielectric layer disposed on the first dielectric layer, second conductive blind holes, and a patterned circuit layer disposed on the second dielectric layer. The first conductive blind holes penetrate through the first dielectric layer and electrically contact the first circuit structure. The second conductive blind holes penetrate through the second dielectric layer and electrically contact the first conductive blind holes respectively. The patterned circuit layer electrically contacts the second conductive blind holes. A manufacturing method of the multi-layer circuit structure is also provided.

公开(公告)号：US20180323143A1

公开(公告)日：2018-11-08

申请号：US16036946

申请日：2018-07-17

Applicant: Industrial Technology Research Institute ,  Unimicron Technology Corp.

Inventor： Yu-Hua Chen ,  Wei-Chung Lo ,  Dyi-Chung Hu ,  Chang-Hong Hsieh

IPC: H01L23/522 ,  H01L25/04 ,  H01L23/498 ,  H01L21/48

CPC classification number: H01L23/5226 ,  H01L21/4857 ,  H01L23/49822 ,  H01L23/49833 ,  H01L23/49838 ,  H01L25/04 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A package substrate and a method of fabricating the package substrate are provided. The package substrate includes a substrate having a first surface including a plurality of conductive pads and a second surface; an insulating protective layer formed on the first surface of the substrate; an interposer embedded in and exposed from the insulating protective layer; and at least a passive component provided on the first surface of the substrate. The insulating protective layer includes at least an opening for exposing at least one of the conductive pads, and the at least the passive component is directly provided on the conductive pad exposed from the opening.

公开(公告)号：US10070536B2

公开(公告)日：2018-09-04

申请号：US15201622

申请日：2016-07-05

Applicant: Unimicron Technology Corp.

Inventor： Chien-Tsai Li ,  Chien-Te Wu ,  Cheng-Chung Lo

IPC: H01K3/10 ,  H05K3/40 ,  H05K3/46 ,  H05K3/22

Abstract: Provided is a manufacturing method of a circuit board structure including steps as below. A glass film is provided on an electrostatic chuck (E-chuck). A dicing process is performed, such that at least one slit is formed in the glass film. A plurality of first conductive vias are formed in the glass film. A first circuit layer is formed on the glass film. A polymer layer is formed on the first circuit layer. The polymer layer covers surfaces of the first circuit layer and the glass film. A plurality of second conductive vias are formed in the polymer layer. A second circuit layer is formed on the polymer layer, such that a first circuit board structure is formed. A singulation process is performed, such that the first circuit board structure is divided into a plurality of second circuit board structures.