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    Display Driver Integrated Circuit Architecture With Shared Reference Voltages
    74.
    发明申请
    Display Driver Integrated Circuit Architecture With Shared Reference Voltages 有权
    显示驱动器集成电路架构与共享参考电压

    公开(公告)号：US20160203777A1

    公开(公告)日：2016-07-14

    申请号：US14993702

    申请日：2016-01-12

    Applicant: Apple Inc.

    Inventor： Kingsuk Brahma ,  David A. Stronks ,  Hopil Bae ,  Wei H. Yao

    IPC: G09G3/36

    CPC classification number: G01R27/205 ,  G09G3/006 ,  G09G3/2092 ,  G09G3/2096 ,  G09G3/3607 ,  G09G3/3696 ,  G09G2300/0426 ,  G09G2310/08 ,  G09G2320/0223

    Abstract: A display may have a substrate layer to which a display driver integrated circuit and flexible printed circuit are bonded. The display driver integrated circuit may be provided with switches and control circuitry for controlling the operation of the switches during bond resistance measurements. Test equipment may apply currents to pads in the display driver integrated circuit through contacts in the flexible printed circuit while controlling the switching circuitry. Based on these measurements and the measurement of trace resistances in a dummy flexible printed circuit, the test equipment may determine bond resistances for bonds between the display driver integrated circuit and the display substrate and between the flexible printed circuit and the display substrate. Displays may have master and slave display driver integrated circuits that share coarse reference voltages produced by the master from raw power supply voltages.

    Abstract translation: 显示器可以具有显示驱动器集成电路和柔性印刷电路结合到其上的基板层。 显示驱动器集成电路可以设置有用于在接合电阻测量期间控制开关的操作的开关和控制电路。 测试设备可以通过柔性印刷电路中的触点在显示驱动器集成电路中的焊盘上施加电流，同时控制开关电路。 基于这些测量和虚拟柔性印刷电路中的迹线电阻的测量，测试设备可以确定显示驱动器集成电路和显示器基板之间以及柔性印刷电路和显示器基板之间的结合的结合电阻。 显示器可以具有主从显示驱动器集成电路，其从原始电源电压共享由主机产生的粗参考电压。

    Liquid crystal display using depletion-mode transistors
    75.
    发明授权
    Liquid crystal display using depletion-mode transistors 有权
    使用耗尽型晶体管的液晶显示器

    公开(公告)号：US09214127B2

    公开(公告)日：2015-12-15

    申请号：US13937825

    申请日：2013-07-09

    Applicant: APPLE INC.

    Inventor： Abbas Jamshidi-Roudbari ,  Cheng-Ho Yu ,  Hopil Bae ,  Shih Chang Chang ,  Ting-Kuo Chang

    IPC: G09G5/00 ,  G09G3/36

    CPC classification number: G09G3/3696 ,  G09G3/3688 ,  G09G2310/0245 ,  G09G2310/0297 ,  G09G2320/0204 ,  G09G2320/0266 ,  G09G2330/027

    Abstract: Methods and devices employing charge removal circuitry are provided to reduce or eliminate artifacts due to a bias voltage remaining on an electronic display after the display is turned off. In one example, a method may include connecting a pixel electrode of a display to ground through charge removal circuitry while the display is off (e.g., using depletion-mode transistors that are active when gates of the depletion-mode transistors are provided a ground voltage). When a corresponding common electrode is also connected to ground, a voltage difference between the pixel electrode and common electrode may be reduced or eliminated, preventing a bias voltage from causing display artifacts in the pixel.

    Abstract translation: 提供了使用电荷去除电路的方法和装置，以减少或消除由于在显示器关闭之后电子显示器上剩余的偏置电压引起的伪影。 在一个示例中，方法可以包括通过电荷去除电路将显示器的像素电极连接到显示器关闭时（例如，使用在耗尽型晶体管的栅极被提供接地电压时有效的耗尽型晶体管） ）。 当相应的公共电极也接地时，可以减小或消除像素电极和公共电极之间的电压差，从而防止偏置电压在像素中引起显示伪影。

    Electronic Device Display With Shielding Layer
    76.
    发明申请
    Electronic Device Display With Shielding Layer 有权
    带屏蔽层的电子设备显示屏

    公开(公告)号：US20140293144A1

    公开(公告)日：2014-10-02

    申请号：US13854376

    申请日：2013-04-01

    Applicant: APPLE INC.

    Inventor： Hopil Bae

    IPC: G06F3/041 ,  G02F1/1335

    CPC classification number: G06F3/041 ,  G02F1/13452 ,  G06F2203/04103 ,  G06F2203/04107

    Abstract: A display may have a color filter layer and a thin-film transistor layer. A layer of liquid crystal material may be located between the color filter layer and the thin-film transistor layer. A transparent conductive shielding layer may be formed on the lower surface of the thin-film transistor layer. Grounding structures may ground the transparent conductive shielding layer to a ground. The ground may be formed form metal traces on a flexible printed circuit. The display may have a backlight unit. Light-emitting diodes may be used to provide backlight for the backlight unit. The light-emitting diodes may be mounted on the flexible printed circuit. The grounding structures may be formed from a rectangular ring-shaped conductive tape or other conductive structures.

    Abstract translation: 显示器可以具有滤色器层和薄膜晶体管层。 液晶材料层可以位于滤色器层和薄膜晶体管层之间。 透明导电屏蔽层可以形成在薄膜晶体管层的下表面上。 接地结构可将透明导电屏蔽层接地。 地面可以由柔性印刷电路上的金属迹线形成。 显示器可以具有背光单元。 发光二极管可用于为背光单元提供背光。 发光二极管可以安装在柔性印刷电路上。 接地结构可以由矩形环形导电带或其它导电结构形成。

    Systems and Methods for Reducing or Eliminating Mura Artifact Using Image Feedback
    77.
    发明申请
    Systems and Methods for Reducing or Eliminating Mura Artifact Using Image Feedback 有权
    使用图像反馈减少或消除Mura人工制品和方法

    公开(公告)号：US20130328843A1

    公开(公告)日：2013-12-12

    申请号：US13654231

    申请日：2012-10-17

    Applicant: APPLE INC.

    Inventor： Ahmad Al-Dahle ,  David A. Stronks ,  Hopil Bae

    IPC: G09G3/36 ,  G09G5/00 ,  G09G5/10

    CPC classification number: G09G3/3696 ,  G09G3/006 ,  G09G3/3655 ,  G09G2310/067 ,  G09G2320/0223 ,  G09G2320/0233 ,  G09G2320/0693 ,  G09G2360/145

    Abstract: Systems, methods, and devices for calibrating an electronic display to reduce or eliminate a mura artifact are provided. The mura artifact may be due to differential behavior of common voltage layers (VCOMs) in the electronic display. One method for reducing or eliminating the mura artifact may involve setting pixels of the electronic display to a first gray level and measuring a luminance difference between light and dark areas of a mura artifact on the electronic display. A value of an operating parameter of the electronic display may be adjusted while monitoring the luminance difference measurement. A value of the operating parameter that causes the luminance difference measurement to be within a specified range of acceptable luminance difference measurement values may be stored in the electronic display.

    Abstract translation: 提供了用于校准电子显示器以减少或消除mura伪影的系统，方法和设备。 该mura伪影可能是由于电子显示器中的公共电压层（VCOM）的差异行为。 用于减少或消除凹陷假象的一种方法可以包括将电子显示器的像素设置为第一灰度级并且测量电子显示器上的mura伪影的亮区和暗区之间的亮度差。 可以在监视亮度差测量的同时调整电子显示器的操作参数的值。 导致亮度差测量在可接受的亮度差测量值的指定范围内的操作参数的值可以存储在电子显示器中。

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