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公开(公告)号：US06603468B2
公开(公告)日：2003-08-05
申请号：US09796633
申请日：2001-03-02
IPC分类号： G09G500
CPC分类号： G09G3/3685 , G09G5/008 , G09G2320/0223
摘要： A liquid crystal display device includes a liquid crystal panel; a plurality of data drivers for applying, to the pixel elements, graduation voltages corresponding to the display data; a gate driver for selecting a pixel element to which a graduation voltage is to be applied; and a liquid crystal control circuit for controlling the data drivers on the basis of a transfer clock. Each data driver includes a reproducing circuit for reproducing the transfer clock input to the data driver such that the deviations between the duties of the display data and the transfer clock input to the data driver and the duties of the display data and the transfer clock output from the data driver become small, and for generating a latch clock, and a latch circuit for latching the display data input to the data driver.
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公开(公告)号：US06392619B1
公开(公告)日：2002-05-21
申请号：US09313251
申请日：1999-05-18
IPC分类号： G09G336
CPC分类号： G09G3/3611 , G09G3/3685
摘要： In a data transfer circuit, a hold signal generating circuit generates and outputs a hold signal Hold when transmission data is equal to transmission data one cycle before, and sets a 3-state output buffer for transmission data to high-impedance state, while, in a data reception circuit, when the hold signal Hold is valid, a data reception circuit outputs the reception data held, thereby power consumption in a data bus which is terminated with a terminal resistor is reduced.
摘要翻译： 在数据传输电路中，保持信号发生电路在传输数据等于发送数据之前一个周期产生并输出保持信号Hold，并将发送数据的3状态输出缓冲器设置为高阻抗状态，而在 数据接收电路，当保持信号保持有效时，数据接收电路输出保持的接收数据，从而减少终端电阻终止的数据总线中的功耗。
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公开(公告)号：US06225230B1
公开(公告)日：2001-05-01
申请号：US08861736
申请日：1997-05-22
申请人： Hiroyuki Nitta , Yusuke Kohyama
发明人： Hiroyuki Nitta , Yusuke Kohyama
IPC分类号： H01L2100
CPC分类号： H01L21/76229
摘要： Disclosed is a method of forming an element isolation insulating film by STI (shallow trench isolation) method, which permits effectively preventing a concave portion from being formed in an edge of the element isolation insulating film, permits decreasing the number of treating steps, and also permits facilitating the formation of the element isolation insulating film with a high yield. In forming the element isolation insulating film, a groove is formed in a surface region of a semiconductor substrate, followed by forming an insulating film on the entire surface to fill at least the groove. Then, a flattening treatment is applied at least once to remove the insulating film from the substrate surface such that the insulating film is left unremoved only within the groove. In place of a wet etching treatment, a mirror-polishing method is employed for the last flattening treatment.
摘要翻译： 公开了通过STI（浅沟槽隔离）方法形成元件隔离绝缘膜的方法，其可有效地防止在元件隔离绝缘膜的边缘中形成凹部，从而减少处理步骤的数量，并且还 允许以高产率促进元件隔离绝缘膜的形成。 在形成元件隔离绝缘膜时，在半导体衬底的表面区域中形成沟槽，然后在整个表面上形成绝缘膜以至少填充沟槽。 然后，平坦化处理至少施加一次以从基板表面去除绝缘膜，使得绝缘膜仅在沟槽内不被移除。 代替湿蚀刻处理，最后的平坦化处理采用镜面抛光方法。
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公开(公告)号：US6088014A
公开(公告)日：2000-07-11
申请号：US891751
申请日：1997-07-14
申请人： Tsutomu Furuhashi , Hiroyuki Mano , Naruhiko Kasai , Satoru Tsunekawa , Hiroshi Kurihara , Hiroyuki Nitta , Hirofumi Koshi , Yoshihisa Oishi , Nobutaka Kato
发明人： Tsutomu Furuhashi , Hiroyuki Mano , Naruhiko Kasai , Satoru Tsunekawa , Hiroshi Kurihara , Hiroyuki Nitta , Hirofumi Koshi , Yoshihisa Oishi , Nobutaka Kato
CPC分类号： G09G5/005 , G09G3/3611 , G09G3/3688 , G09G2310/0205 , G09G2310/027 , G09G2310/0286 , G09G2310/08 , G09G2340/0407 , G09G2340/0414 , G09G2340/0421 , G09G2340/0471 , G09G2340/0478 , G09G2340/0485 , G09G3/3685 , G09G5/006
摘要： A liquid crystal display device of the present invention capable of enlarging and displaying to a high picture quality even when display data having a lower resolution than a liquid crystal panel is inputted, is provided with storage element groups every drain line within latches of a liquid crystal driver. A portion of the storage element groups simultaneously captures display data. In doing so, the same liquid crystal apply voltage is outputted from drain lines corresponding to these storage element groups. Storage element groups corresponding to neighboring drain lines then simultaneously capture display data so as to enlarge an image in the horizontal direction. The rate of enlargement can be regulated by changing the number of storage element groups simultaneously capturing display data. A scanning driver then simultaneously selects a plurality of rows with a select voltage being applied to the simultaneously selected rows of pixel elements in the same period so as to enlarge the image in the vertical direction. Enlarged displaying is therefore possible by the liquid crystal driver regulating an output period of the liquid crystal apply voltage even when rows are selected one at a time.
摘要翻译： 即使输入了比液晶面板的分辨率低的显示数据，本发明的液晶显示装置即使在液晶面板的锁存器内的每个漏极线上也设有存储元件组， 司机。 存储元件组的一部分同时捕获显示数据。 在这样做时，从与这些存储元件组对应的漏极线输出相同的液晶施加电压。 对应于相邻排水管线的存储元件组然后同时捕获显示数据，以便在水平方向上放大图像。 可以通过改变存储元件组的数量同时捕获显示数据来调节放大率。 扫描驱动器然后同时选择多个行，其中选择电压被施加到相同周期中的同时选择的像素元素行，以便在垂直方向上放大图像。 因此，即使当一行一行地选择行时，液晶驱动器调节液晶施加电压的输出周期也可以进行放大显示。
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公开(公告)号：US08860116B2
公开(公告)日：2014-10-14
申请号：US12546885
申请日：2009-08-25
申请人： Takeshi Sakaguchi , Hiroyuki Nitta
发明人： Takeshi Sakaguchi , Hiroyuki Nitta
IPC分类号： H01L29/76 , H01L27/115 , H01L21/3213 , H01L27/02 , H01L21/308
CPC分类号： H01L27/11519 , H01L21/3086 , H01L21/32139 , H01L27/0207 , H01L27/11521 , H01L27/11524
摘要： A nonvolatile semiconductor memory of an aspect of the present invention including a plurality of first active areas which are provided in the memory cell array side-by-side in a first direction and which have a dimension smaller than a fabrication limit dimension obtained by lithography, a second active area provided between the first active areas adjacent in the first direction, a memory cell unit which is provided in each of the plurality of first active areas and which has memory cells and select transistors, and a linear contact which is connected to one end of the memory cell unit and which extends in the first direction, wherein an area in which the linear contact is provided is one semiconductor area to which the plurality of first active areas are connected by the plurality of second active areas, and the bottom surface of the linear contact is planar.
摘要翻译： 本发明的一个方面的非易失性半导体存储器包括多个第一有源区，它们沿着第一方向并排设置在存储单元阵列中，并且具有小于通过光刻获得的制造极限尺寸的尺寸， 设置在第一方向相邻的第一有源区之间的第二有源区，设置在多个第一有源区中的每一个中并具有存储单元和选择晶体管的存储单元单元，以及连接到第一有源区的一个线性触点 存储单元单元的端部并且沿着第一方向延伸，其中设置有线性触点的区域是多个第一有源区域通过多个第二有源区域连接的一个半导体区域，并且底表面 的线性接触是平面的。
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公开(公告)号：US08633951B2
公开(公告)日：2014-01-21
申请号：US13684676
申请日：2012-11-26
申请人： Yoshiki Kurokawa , Yasuyuki Kudo , Hiroyuki Nitta , Kazuki Homma , Junya Takeda
发明人： Yoshiki Kurokawa , Yasuyuki Kudo , Hiroyuki Nitta , Kazuki Homma , Junya Takeda
IPC分类号： G09G5/00 , G09G5/02 , G06T1/00 , G06K9/00 , G06K9/40 , H04N1/40 , H04N1/46 , H04N5/46 , H04N9/30 , H04N9/28
CPC分类号： G09G1/002 , G09G3/3655 , G09G5/04 , G09G5/06 , G09G2320/0242 , G09G2340/145
摘要： A display drive circuit of the invention has: an initial-color-gamut-apex-coordinate-storing unit capable of storing initial color gamut apex coordinates; a user-target-color-gamut-apex-coordinate-storing unit capable of storing user target color gamut apex coordinates; a saturation-expansion-coefficient-deciding unit for deciding expansion coefficients of saturation data based on the initial and user target color gamut apex coordinates; and an expansion unit for expanding saturations of display data based on the saturation expansion coefficients. The expansion coefficients of saturation data are decided based on the initial and user target color gamut apex coordinates, and saturations of display data are expanded according to the expansion coefficients. Thus, the degree of expanding the saturations can be controlled for each color gamut or each of R, G and B color properties of an LC display panel.
摘要翻译： 本发明的显示驱动电路具有：能够存储初始色域顶点坐标的初始色域 - 顶点坐标存储单元; 能够存储用户目标色域顶点坐标的用户对象色彩 - 顶点坐标存储单元; 饱和扩张系数决定单元，用于基于初始和用户目标色域顶点坐标来确定饱和度数据的扩展系数; 以及用于基于饱和度膨胀系数扩大显示数据的饱和度的扩展单元。 基于初始和用户目标色域顶点坐标来确定饱和度数据的扩展系数，根据扩展系数扩展显示数据的饱和度。 因此，可以对于每个色域或LC显示面板的R，G和B颜色属性中的每一个来控制饱和度的扩大程度。
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77.发明授权Method of manufacturing a semiconductor device including an insulating film beside an element isolation film 失效制造包括元件隔离膜旁边的绝缘膜的半导体器件的方法公开(公告)号：US08377720B2
公开(公告)日：2013-02-19
申请号：US11419079
申请日：2006-05-18
IPC分类号： H01L21/00
CPC分类号： H01L27/088 , H01L21/823857 , H01L21/823892 , H01L27/0207 , H01L27/115 , H01L27/11526 , H01L27/11546
摘要： A method of manufacturing a semiconductor device involves process for forming gate insulating films of different thickness on a semiconductor substrate, depositing films that constitute a gate electrode, removing the gate insulating films having different thickness formed on an impurity diffusion region surface of a transistor including the gate electrode, and doping impurities into a portion where the gate insulating film is removed.
摘要翻译： 半导体器件的制造方法包括在半导体衬底上形成不同厚度的栅极绝缘膜的工艺，沉积构成栅电极的膜，去除在包括晶体管的晶体管的杂质扩散区域表面上形成的具有不同厚度的栅极绝缘膜 栅极电极和将杂质掺杂到去除栅极绝缘膜的部分中。
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78.发明授权公开(公告)号：US08349686B2
公开(公告)日：2013-01-08
申请号：US13197580
申请日：2011-08-03
申请人： Hiroyuki Nitta
发明人： Hiroyuki Nitta
IPC分类号： H01L21/00
CPC分类号： H01L27/11524 , H01L21/764 , H01L23/5222 , H01L27/11521 , H01L2924/0002 , H01L2924/00
摘要： To reduce capacitance between each adjacent two word lines in a semiconductor memory device, a first insulating film is formed, with a first gate insulating film thereunder, in an interstice between gates respectively of each adjacent two memory transistors, and in an interstice between a gate of a selective transistor and a gate of a memory transistor adjacent thereto. Additionally, a second insulating film is formed on the first insulating film, sides of the gate of each memory transistor, and a side, facing the memory transistor, of the gate of the selective transistor. A third insulating film is formed parallel to a semiconductor substrate so as to cover a metal silicide film, the first and second insulating films and fourth and fifth insulating films. Avoid part is provided in the interstice between each adjacent two gates of the memory transistors, and in the interstice between the gate of the selective transistor and the gate of the memory transistor adjacent thereto. A bottom and two sides of each void part are shielded by the second insulating film, and a top of each void part is shielded by the third insulating film.
摘要翻译： 为了减小半导体存储器件中每个相邻两个字线之间的电容，在每个相邻的两个存储晶体管的栅极之间的间隙中形成第一绝缘膜，其间具有第一栅极绝缘膜，并且在栅极 的选择晶体管和与其相邻的存储晶体管的栅极。 此外，第二绝缘膜形成在第一绝缘膜上，每个存储晶体管的栅极的侧面和面向存储晶体管的选择性晶体管的栅极的一侧。 第三绝缘膜平行于半导体衬底形成以覆盖金属硅化物膜，第一和第二绝缘膜以及第四和第五绝缘膜。 避免在存储晶体管的每个相邻两个栅极之间的间隙中以及选择性晶体管的栅极和与其相邻的存储晶体管的栅极之间的间隙中提供部件。 每个空隙部分的底部和两侧被第二绝缘膜屏蔽，并且每个空隙部分的顶部被第三绝缘膜屏蔽。
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公开(公告)号：US08345072B2
公开(公告)日：2013-01-01
申请号：US13423315
申请日：2012-03-19
申请人： Yoshiki Kurokawa , Yasuyuki Kudo , Hiroyuki Nitta , Kazuki Homma , Junya Takeda
发明人： Yoshiki Kurokawa , Yasuyuki Kudo , Hiroyuki Nitta , Kazuki Homma , Junya Takeda
CPC分类号： G09G1/002 , G09G3/3655 , G09G5/04 , G09G5/06 , G09G2320/0242 , G09G2340/145
摘要： A display drive circuit of the invention has: an initial-color-gamut-apex-coordinate-storing unit capable of storing initial color gamut apex coordinates; a user-target-color-gamut-apex-coordinate-storing unit capable of storing user target color gamut apex coordinates; a saturation-expansion-coefficient-deciding unit for deciding expansion coefficients of saturation data based on the initial and user target color gamut apex coordinates; and an expansion unit for expanding saturations of display data based on the saturation expansion coefficients. The expansion coefficients of saturation data are decided based on the initial and user target color gamut apex coordinates, and saturations of display data are expanded according to the expansion coefficients. Thus, the degree of expanding the saturations can be controlled for each color gamut or each of R, G and B color properties of an LC display panel.
摘要翻译： 本发明的显示驱动电路具有：能够存储初始色域顶点坐标的初始色域 - 顶点坐标存储单元; 能够存储用户目标色域顶点坐标的用户对象色彩 - 顶点坐标存储单元; 饱和扩张系数决定单元，用于基于初始和用户目标色域顶点坐标来确定饱和度数据的扩展系数; 以及用于基于饱和度膨胀系数扩大显示数据的饱和度的扩展单元。 基于初始和用户目标色域顶点坐标来确定饱和度数据的扩展系数，根据扩展系数扩展显示数据的饱和度。 因此，可以对于每个色域或LC显示面板的R，G和B颜色属性中的每一个来控制饱和度的扩大程度。
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公开(公告)号：US20120020158A1
公开(公告)日：2012-01-26
申请号：US13187000
申请日：2011-07-20
申请人： Tohru OZAKI , Mitsuhiro Noguchi , Hideaki Maekawa , Hiromitsu Mashita , Takafumi Taguchi , Kazuhito Kobayashi , Hidefumi Mukai , Hiroyuki Nitta
发明人： Tohru OZAKI , Mitsuhiro Noguchi , Hideaki Maekawa , Hiromitsu Mashita , Takafumi Taguchi , Kazuhito Kobayashi , Hidefumi Mukai , Hiroyuki Nitta
CPC分类号： H01L27/11521
摘要： A memory cell array includes memory strings arranged in a first direction. Word-lines and select gate lines extend in a second direction perpendicular to the first direction. The select gate line also extends in the second direction. The word-lines have a first line width in the first direction and arranged with a first distance therebetween. The select gate line includes a first interconnection in the first direction, the first interconnection having a second line width larger than the first line width, and a second interconnection extending from an end portion of the first interconnection, the second interconnection having a third line width the same as the first line width. A first word-line adjacent to the select gate line is arranged having a second distance to the second interconnection, the second distance being (4N+1) times the first distance (N being an integer of 1 or more).
摘要翻译： 存储单元阵列包括沿第一方向布置的存储器串。 字线和选择栅极线在垂直于第一方向的第二方向上延伸。 选择栅极线也沿第二方向延伸。 字线在第一方向上具有第一线宽度并且以它们之间的第一距离布置。 选择栅极线包括在第一方向上的第一互连，第一互连具有大于第一线宽的第二线宽，以及从第一互连的端部延伸的第二互连，第二互连具有第三线宽 与第一行宽度相同。 与选择栅极线相邻的第一字线布置成具有到第二互连的第二距离，第二距离为（4N + 1）倍于第一距离（N为1或更大的整数）。
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