Driver circuitry for piezoelectric transducers

    公开(公告)号:US11731163B2

    公开(公告)日:2023-08-22

    申请号:US16989050

    申请日:2020-08-10

    CPC classification number: B06B1/0207 H02M3/07 H10N30/20 H10N30/802

    Abstract: The present disclosure relates to circuitry for driving a piezoelectric transducer based on an input signal. The circuitry comprises: primary driver circuitry configured to receive the input signal and to output a primary driving signal to the piezoelectric transducer based on the input signal; and secondary driver circuitry configured to receive an error signal indicative of an error between the input signal and the primary driving signal and to output a secondary driving signal to the piezoelectric transducer based on the error signal, wherein the primary driver circuitry and the secondary driver circuitry both comprise switching converter circuitry.

    Driver circuitry
    73.
    发明授权

    公开(公告)号:US11646708B2

    公开(公告)日:2023-05-09

    申请号:US17113561

    申请日:2020-12-07

    Abstract: The present disclosure relates to circuitry for driving a piezoelectric transducer. The circuitry comprises amplifier circuitry configured to receive a drive signal and to output an output signal, based on the drive signal, to the piezoelectric transducer, a variable capacitor configured to be coupled in series with the piezoelectric transducer, and control circuitry. The control circuitry is configured to control a capacitance of the variable capacitor to compensate for hysteresis in the piezoelectric transducer and to control a gain of the amplifier circuitry to compensate for signal attenuation caused by the variable capacitor.

    Class D amplifier circuitry
    74.
    发明授权

    公开(公告)号:US11588452B2

    公开(公告)日:2023-02-21

    申请号:US17186741

    申请日:2021-02-26

    Abstract: Class D amplifier circuitry comprising: modulator circuitry; and output stage circuitry, wherein the modulator circuitry is configured to: receive an input signal and first and second carrier signals, wherein the second carrier signal is offset in amplitude with respect to the first carrier signal; generate first and second modulated output signals, each of the first and second modulated output signals being based on the input signal and the first and second carrier signals; and generate a plurality of control signals for the output stage circuitry per signal period of the modulated output signals, wherein the plurality of control signals are based on the first and second modulated output signals, and wherein at least one of the plurality of control signals per signal period comprises a signal level transition.

    Wear detection
    75.
    发明授权

    公开(公告)号:US11533574B2

    公开(公告)日:2022-12-20

    申请号:US17412862

    申请日:2021-08-26

    Inventor: John P. Lesso

    Abstract: A method is used for detecting whether a device is being worn, when the device comprises a first transducer and a second transducer. It is determined when a signal detected by at least one of the first and second transducers represents speech. It is then determined when said speech contains speech of a first acoustic class and speech of a second acoustic class. A first correlation signal is generated, representing a correlation between signals generated by the first and second transducers during at least one period when said speech contains speech of the first acoustic class. A second correlation signal is generated, representing a correlation between signals generated by the first and second transducers during at least one period when said speech contains speech of the second acoustic class. It is then determined from the first correlation signal and the second correlation signal whether the device is being worn.

    Driver circuitry
    76.
    发明授权

    公开(公告)号:US11483654B2

    公开(公告)日:2022-10-25

    申请号:US17158540

    申请日:2021-01-26

    Abstract: This application relates to driver circuitry (200) for receiving a digital input signal (D) and outputting, at first and second output nodes (203p, 203n), first and second analogue driving signals respectively for driving a transducer (101), e.g. loudspeaker, in a bridge-tied-load configuration. The driver circuitry may particularly be suitable for driving low-impedance transducers. The driver circuitry has first and second digital-to-analogue converters (201p, 201n) configured to receive the digital input signal and the outputs of the first and second digital-to-analogue converters are coupled to the first and second output nodes respectively. A differential-output amplifier circuit (202) has outputs connected to the first and second output nodes and is configured to regulate the outputs of the digital-to-analogue converters at output nodes to provide the analogue driving signals.

    CHARGE PUMP CIRCUIT
    77.
    发明申请

    公开(公告)号:US20220321003A1

    公开(公告)日:2022-10-06

    申请号:US17845007

    申请日:2022-06-21

    Abstract: A bipolar output charge pump circuit having a network of switching paths for selectively connecting an input node and a reference node for connection to an input voltage, a first pair of output nodes and a second pair of output nodes, and two pairs of flying capacitor nodes, and a controller for controlling the switching of the network of switching paths. The controller is operable to control the network of switching paths when in use with two flying capacitors connected to the two pairs of flying capacitor nodes, to provide a first bipolar output voltage at the first pair of output nodes and a second bipolar output voltage at the second pair of bipolar output nodes.

    Charge pump circuit
    78.
    发明授权

    公开(公告)号:US11146171B2

    公开(公告)日:2021-10-12

    申请号:US16427892

    申请日:2019-05-31

    Abstract: A bipolar output charge pump circuit having a network of switching paths for selectively connecting an input node and a reference node for connection to an input voltage, a first pair of output nodes, two pairs of flying capacitor nodes, and a controller for controlling the switching of the network of switching paths. The controller is operable to control the network of switching paths when in use with two flying capacitors connected to the two pairs of flying capacitor nodes, to provide a first mode and a second mode when in use with two flying capacitors connected to the flying capacitor nodes, wherein at least the first mode corresponds to a bipolar output voltage of +/−3VV, +/−VV/5 or +/−VV/6.

    AMPLIFIER CIRCUIT AND METHODS OF OPERATION THEREOF

    公开(公告)号:US20210297762A1

    公开(公告)日:2021-09-23

    申请号:US17338271

    申请日:2021-06-03

    Abstract: A signal amplifying circuit and associated methods and apparatuses, the circuit comprising: a signal path extending from an input terminal to an output terminal, a gain controller arranged to control the gain applied along the signal path in response to a control signal; an output stage within the signal path for generating the output signal, the output stage having a gain that is substantially independent of its supply voltage, and a variable voltage power supply comprising a charge pump for providing positive and negative output voltages, the charge pump comprising a network of switches that is operable in a number of different states and a controller for operating the switches in a sequence of the states so as to generate positive and negative output voltages together spanning a voltage approximately equal to the input voltage.

    CHARGE PUMP CIRCUIT
    80.
    发明申请

    公开(公告)号:US20210281168A9

    公开(公告)日:2021-09-09

    申请号:US16427892

    申请日:2019-05-31

    Abstract: A bipolar output charge pump circuit having a network of switching paths for selectively connecting an input node and a reference node for connection to an input voltage, a first pair of output nodes, two pairs of flying capacitor nodes, and a controller for controlling the switching of the network of switching paths. The controller is operable to control the network of switching paths when in use with two flying capacitors connected to the two pairs of flying capacitor nodes, to provide a first mode and a second mode when in use with two flying capacitors connected to the flying capacitor nodes, wherein at least the first mode corresponds to a bipolar output voltage of +/−3VV, +/−VV/5 or +/−VV/6.

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