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公开(公告)号：US20110320869A1
公开(公告)日：2011-12-29
申请号：US12822964
申请日：2010-06-24
申请人： Kevin C. Gower , Lisa C. Gower , Luis A. Lastras-Montano , Patrick J. Meaney , Vesselina K. Papazova , Eldee Stephens
发明人： Kevin C. Gower , Lisa C. Gower , Luis A. Lastras-Montano , Patrick J. Meaney , Vesselina K. Papazova , Eldee Stephens
CPC分类号： G06F11/1666 , G06F11/1044 , G06F11/108 , G06F11/141 , G06F11/1604 , G06F11/20 , G06F11/2007 , G06F2211/1088
摘要： Providing homogeneous recovery in a redundant memory system that includes a memory controller, a plurality of memory channels in communication with the memory controller, an error detection code mechanism configured for detecting a failing memory channel, and an error recovery mechanism. The error recovery mechanism is configured for receiving notification of the failing memory channel, for blocking off new operations from starting on the memory channels, for completing any pending operations on the memory channels, for performing a recovery operation on the memory channels and for starting the new operations on at least a first subset of the memory channels. The memory system is capable of operating with the first subset of the memory channels.
摘要翻译： 在包括存储器控制器，与存储器控制器通信的多个存储器通道，用于检测故障存储器通道的错误检测代码机构和错误恢复机制的冗余存储器系统中提供均匀恢复。 错误恢复机制被配置为用于接收故障存储器通道的通知，用于阻止新的操作在存储器通道上启动，以完成存储器通道上的任何未决操作，用于在存储器通道上执行恢复操作并启动 至少在存储器通道的第一子集上进行新的操作。 存储器系统能够与存储器通道的第一子集一起操作。
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公开(公告)号：US20110320864A1
公开(公告)日：2011-12-29
申请号：US12822968
申请日：2010-06-24
申请人： Kevin C. Gower , Lisa C. Gower , Luis A. Lastras-Montano , Patrick J. Meaney , Vesselina K. Papazova , Eldee Stephens
发明人： Kevin C. Gower , Lisa C. Gower , Luis A. Lastras-Montano , Patrick J. Meaney , Vesselina K. Papazova , Eldee Stephens
CPC分类号： G06F11/2053 , G06F11/073 , G06F11/0793 , G06F11/1004 , G06F11/108 , G06F11/141 , G06F11/1604 , G06F11/1666 , G06F11/20 , G06F11/2007 , G06F2211/1088
摘要： Providing heterogeneous recovery in a redundant memory system that includes a memory controller, a plurality of memory channels in communication with the memory controller, an error detection code mechanism configured for detecting a failing memory channel, and an error recovery mechanism. The error recovery mechanism is configured for receiving notification of the failing memory channel, for performing a recovery operation on the failing memory channel while other memory channels are performing normal system operations, for bringing the recovered channel back into operational mode with the other memory channels for store operations, for continuing to mark the recovered channel to guard against stale data, for removing any stale data after the recovery operation is complete, and for removing the mark on the recovered channel to allow the normal system operations with all of the memory channels, the removing in response to the removing any stale data being complete.
摘要翻译： 在包括存储器控制器，与存储器控制器通信的多个存储器通道，配置用于检测故障存储器通道的错误检测代码机构和错误恢复机制的冗余存储器系统中提供异构恢复。 错误恢复机制被配置为用于接收故障存储器通道的通知，用于在其他存储器通道执行正常的系统操作时对故障存储器通道执行恢复操作，以使恢复的通道与其它存储器通道重新进入操作模式， 存储操作，用于继续标记恢复的通道以防止陈旧的数据，用于在恢复操作完成之后去除任何陈旧的数据，以及用于去除恢复的通道上的标记，以允许所有存储器通道的正常系统操作， 删除，以响应删除任何陈旧的数据完成。
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公开(公告)号：US08086783B2
公开(公告)日：2011-12-27
申请号：US12390731
申请日：2009-02-23
IPC分类号： G06F12/00
CPC分类号： G06F11/1004 , G06F12/0886
摘要： A memory system with high availability is provided. The memory system includes multiple memory channels. Each memory channel includes at least one memory module with memory devices organized as partial ranks coupled to memory device bus segments. Each partial rank includes a subset of the memory devices accessible as a subchannel on a subset of the memory device bus segments. The memory system also includes a memory controller in communication with the multiple memory channels. The memory controller distributes an access request across the memory channels to access a full rank. The full rank includes at least two of the partial ranks on separate memory channels. Partial ranks on a common memory module can be concurrently accessed. The memory modules can use at least one checksum memory device as a dedicated checksum memory device or a shared checksum memory device between at least two of the concurrently accessible partial ranks.
摘要翻译： 提供了高可用性的内存系统。 存储器系统包括多个存储器通道。 每个存储器通道包括至少一个存储器模块，其中存储器件被组织为耦合到存储器设备总线段的部分等级。 每个部分等级包括作为存储器设备总线段的子集上的子信道可访问的存储器件的子集。 存储器系统还包括与多个存储器通道通信的存储器控制器。 存储器控制器通过存储器通道分配访问请求以访问完整等级。 完整等级包括在独立内存通道上的至少两个部分等级。 可以同时访问公共内存模块上的部分排名。 存储器模块可以在至少两个可同时访问的部分等级之间使用至少一个校验和存储器设备作为专用校验和存储器设备或共享校验和存储器设备。
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公开(公告)号：US07949931B2
公开(公告)日：2011-05-24
申请号：US11619015
申请日：2007-01-02
IPC分类号： H03M13/00
CPC分类号： H03M13/1515 , G06F11/1044 , H03M13/159 , H03M13/3715
摘要： A method for error detection in a memory system. The method includes calculating one or more signatures associated with data that contains an error. It is determined if the error is a potential correctable error. If the error is a potential correctable error, then the calculated signatures are compared to one or more signatures in a trapping set. The trapping set includes signatures associated with uncorrectable errors. An uncorrectable error flag is set in response to determining that at least one of the calculated signatures is equal to a signature in the trapping set.
摘要翻译： 一种存储系统中的错误检测方法。 该方法包括计算与包含错误的数据相关联的一个或多个签名。 确定错误是否是潜在的可纠正错误。 如果错误是潜在的可纠正错误，则将计算的签名与陷阱集中的一个或多个签名进行比较。 陷阱集包括与不可纠正错误相关联的签名。 响应于确定所计算的签名中的至少一个等于捕获集合中的签名，设置不可校正的错误标志。
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公开(公告)号：US20100293437A1
公开(公告)日：2010-11-18
申请号：US12023498
申请日：2008-01-31
申请人： Marc A. Gollub , Luis A. Lastras-Montano , Piyush C. Patel , Eric E. Retter , Barry M. Trager , Shmuel Winograd , Kenneth L. Wright
发明人： Marc A. Gollub , Luis A. Lastras-Montano , Piyush C. Patel , Eric E. Retter , Barry M. Trager , Shmuel Winograd , Kenneth L. Wright
CPC分类号： H03M13/1545 , G06F11/1048 , H03M13/1515 , H03M13/154 , H03M13/353 , H03M13/3707 , H03M13/6511
摘要： A system to improve memory failure management may include memory, and an error control decoder to determine failures in the memory. The system may also include an agent that may monitor failures in the memory. The system may further include a table where the error control decoder may record the failures, and where the agent can read and write to.
摘要翻译： 改善存储器故障管理的系统可以包括存储器和用于确定存储器中的故障的错误控制解码器。 系统还可以包括可以监视存储器中的故障的代理。 该系统还可以包括一个表，其中错误控制解码器可以记录故障，以及代理可以在哪里读写。
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76.发明申请System to Improve Error Code Decoding Using Historical Information and Associated Methods 有权使用历史信息和相关方法改进错误代码解码的系统公开(公告)号：US20100287454A1
公开(公告)日：2010-11-11
申请号：US12023445
申请日：2008-01-31
CPC分类号： G06F11/1044
摘要： A system to improve error code decoding using historical information may include storage partitioned into memory ranks, and a table to record symbols having failures for each memory rank. The system may also generate a memory rank score for each memory rank. The system may also include an error control decoder that may use the memory rank score when each memory rank is accessed in order to determine whether an error should be corrected or not.
摘要翻译： 使用历史信息改进错误代码解码的系统可以包括分割成存储器排名的存储器，以及记录具有每个存储器级别故障的符号的表。 系统还可以为每个存储器等级产生存储器等级分数。 系统还可以包括错误控制解码器，其可以在访问每个存储器级时使用存储器等级分数，以便确定是否应该纠正错误。
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公开(公告)号：US20090254705A1
公开(公告)日：2009-10-08
申请号：US12098900
申请日：2008-04-07
IPC分类号： G06F12/08
CPC分类号： G06F12/08 , G06F12/0897 , G06F2212/2022 , G06F2212/2024 , G06F2212/401
摘要： A computer memory system having a three-level memory hierarchy structure is disclosed. The system includes a memory controller, a volatile memory, and a non-volatile memory. The volatile memory is divided into an uncompressed data region and a compressed data region.
摘要翻译： 公开了一种具有三级存储器层次结构的计算机存储器系统。 该系统包括存储器控制器，易失性存储器和非易失性存储器。 易失性存储器被分为未压缩数据区和压缩数据区。
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公开(公告)号：US07471219B1
公开(公告)日：2008-12-30
申请号：US11846795
申请日：2007-08-29
IPC分类号： H03M7/02
CPC分类号： G06F13/4208 , Y02D10/14 , Y02D10/151
摘要： A system and method for providing low latency constrained coding for parallel busses. The method includes receiving a value for a number of transfers and a number of possible constrained patterns between adjacent transfer rows. Data to be encoded is received. The data is converted into indices of constrained patterns, the converting including a number base change into a new base. The new base is chosen so as to optimize the number of operations required to perform the converting subject to the new base being at least as large as the number of possible constrained patterns between adjacent transfer rows. The indices of the constrained pattern are converted into encoded data. The encoded data is then output.
摘要翻译： 一种用于为并行总线提供低延迟约束编码的系统和方法。 该方法包括在相邻的传输行之间接收多个传输的数值和可能的约束模式的数量。 接收要编码的数据。 数据被转换为约束模式的索引，转换包括基数变换为新的基数。 选择新的基座，以便将执行转换对象所需的操作数量优化为至少与相邻传送行之间的可能约束模式的数量一样大的新基址。 约束模式的索引被转换为编码数据。 然后输出编码数据。
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公开(公告)号：US08898511B2
公开(公告)日：2014-11-25
申请号：US12822964
申请日：2010-06-24
申请人： Luis A. Lastras-Montano , Patrick J. Meaney , Vesselina K. Papazova , Eldee Stephens , Lisa C. Gower
发明人： Kevin C. Gower , Luis A. Lastras-Montano , Patrick J. Meaney , Vesselina K. Papazova , Eldee Stephens
CPC分类号： G06F11/1666 , G06F11/1044 , G06F11/108 , G06F11/141 , G06F11/1604 , G06F11/20 , G06F11/2007 , G06F2211/1088
摘要： Providing homogeneous recovery in a redundant memory system that includes a memory controller, a plurality of memory channels in communication with the memory controller, an error detection code mechanism configured for detecting a failing memory channel, and an error recovery mechanism. The error recovery mechanism is configured for receiving notification of the failing memory channel, for blocking off new operations from starting on the memory channels, for completing any pending operations on the memory channels, for performing a recovery operation on the memory channels and for starting the new operations on at least a first subset of the memory channels. The memory system is capable of operating with the first subset of the memory channels.
摘要翻译： 在包括存储器控制器，与存储器控制器通信的多个存储器通道，用于检测故障存储器通道的错误检测代码机构和错误恢复机制的冗余存储器系统中提供均匀恢复。 错误恢复机制被配置为用于接收故障存储器通道的通知，用于阻止新的操作在存储器通道上启动，以完成存储器通道上的任何未决操作，用于在存储器通道上执行恢复操作并启动 至少在存储器通道的第一子集上进行新的操作。 存储器系统能够与存储器通道的第一子集一起操作。
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公开(公告)号：US08631271B2
公开(公告)日：2014-01-14
申请号：US12822968
申请日：2010-06-24
申请人： Kevin C. Gower , Lisa C. Gower , Luis A. Lastras-Montano , Patrick J. Meaney , Vesselina K. Papazova , Eldee Stephens
发明人： Kevin C. Gower , Lisa C. Gower , Luis A. Lastras-Montano , Patrick J. Meaney , Vesselina K. Papazova , Eldee Stephens
IPC分类号： G06F11/00
CPC分类号： G06F11/2053 , G06F11/073 , G06F11/0793 , G06F11/1004 , G06F11/108 , G06F11/141 , G06F11/1604 , G06F11/1666 , G06F11/20 , G06F11/2007 , G06F2211/1088
摘要： Providing heterogeneous recovery in a redundant memory system that includes a memory controller, a plurality of memory channels in communication with the memory controller, an error detection code mechanism configured for detecting a failing memory channel, and an error recovery mechanism. The error recovery mechanism is configured for receiving notification of the failing memory channel, for performing a recovery operation on the failing memory channel while other memory channels are performing normal system operations, for bringing the recovered channel back into operational mode with the other memory channels for store operations, for continuing to mark the recovered channel to guard against stale data, for removing any stale data after the recovery operation is complete, and for removing the mark on the recovered channel to allow the normal system operations with all of the memory channels, the removing in response to the removing any stale data being complete.
摘要翻译： 在包括存储器控制器，与存储器控制器通信的多个存储器通道，配置用于检测故障存储器通道的错误检测代码机构和错误恢复机制的冗余存储器系统中提供异构恢复。 错误恢复机制被配置为用于接收故障存储器通道的通知，用于在其他存储器通道执行正常的系统操作时对故障存储器通道执行恢复操作，以使恢复的通道与其它存储器通道重新进入操作模式， 存储操作，用于继续标记恢复的通道以防止陈旧的数据，用于在恢复操作完成之后去除任何陈旧的数据，以及用于去除恢复的通道上的标记，以允许所有存储器通道的正常系统操作， 删除，以响应删除任何陈旧的数据完成。
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