公开(公告)号：US11557630B2

公开(公告)日：2023-01-17

申请号：US16643322

申请日：2017-09-28

Applicant: Intel Corporation

Inventor： Ravi Pillarisetty ,  Nicole K. Thomas ,  Abhishek A. Sharma ,  Hubert C. George ,  Jeanette M. Roberts ,  Zachary R. Yoscovits ,  Roman Caudillo ,  Kanwaljit Singh ,  James S. Clarke

IPC: H01L27/24 ,  H01L45/00 ,  G06N10/00 ,  H01L29/12 ,  H01L29/15 ,  H01L29/43 ,  H01L29/778 ,  H01L29/66 ,  H01L29/423

Abstract: Disclosed herein are quantum dot devices and techniques. In some embodiments, a quantum computing processing device may include a quantum well stack, an array of quantum dot gate electrodes above the quantum well stack, and an associated array of selectors above the array of quantum dot gate electrodes. The array of quantum dot gate electrodes and the array of selectors may each be arranged in a grid.

公开(公告)号：US11482614B2

公开(公告)日：2022-10-25

申请号：US16645962

申请日：2017-12-23

Applicant: Intel Corporation

Inventor： Ravi Pillarisetty ,  Willy Rachmady ,  Kanwaljit Singh ,  Nicole K. Thomas ,  Hubert C. George ,  Zachary R. Yoscovits ,  Roman Caudillo ,  Payam Amin ,  Jeanette M. Roberts ,  James S. Clarke

IPC: H01L29/66 ,  G06N10/00 ,  H01L27/088 ,  H01L29/12 ,  H01L29/165 ,  H01L29/423 ,  H01L29/43 ,  H01L29/82

Abstract: Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum processing device may include a quantum well stack, the quantum well stack includes a quantum well layer, the quantum processing device further includes a plurality of gates above the quantum well stack to control quantum dot formation in the quantum well stack, and (1) gate metal of individual gates of the array of gates is tapered so as to narrow farther from the quantum well stack or (2) top surfaces of gate metal of individual gates of the array of gates are dished.

公开(公告)号：US11361240B2

公开(公告)日：2022-06-14

申请号：US16307970

申请日：2016-07-01

Applicant: Intel Corporation

Inventor： Jeanette M. Roberts ,  Ravi Pillarisetty ,  Zachary R. Yoscovits ,  James S. Clarke ,  David J. Michalak

IPC: H01L39/22 ,  G06N10/00 ,  G01R33/035 ,  H01L39/24

Abstract: Described herein are structures that include flux bias lines for controlling frequencies of qubits in quantum circuits. An exemplary structure includes a substrate, a qubit provided over a surface of the substrate, and a flux bias line provided below the surface of the substrate and configured to control the frequency of the qubit via a magnetic field generated as a result of a current flowing through the flux bias line. Methods for fabricating such structures are disclosed as well.

公开(公告)号：US11177375B2

公开(公告)日：2021-11-16

申请号：US16308089

申请日：2016-06-09

Applicant: Intel Corporation

Inventor： Jeanette M. Roberts ,  James S. Clarke ,  Ravi Pillarisetty ,  David J. Michalak ,  Zachary R. Yoscovits

IPC: H01L29/78 ,  H01L29/76 ,  H01L29/778 ,  H01L29/06 ,  H01L29/12 ,  H01L29/423 ,  H01L29/66

Abstract: Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a quantum well stack; a plurality of gates disposed on the quantum well stack; and a top gate at least partially disposed on the plurality of gates such that the plurality of gates are at least partially disposed between the top gate and the quantum well stack.

公开(公告)号：US11158731B2

公开(公告)日：2021-10-26

申请号：US16642886

申请日：2017-09-28

Applicant: Intel Corporation

Inventor： Ravi Pillarisetty ,  Van H. Le ,  Nicole K. Thomas ,  Hubert C. George ,  Jeanette Roberts ,  Payam Amin ,  Zachary R. Yoscovits ,  Roman Caudillo ,  James S. Clarke ,  Roza Kotlyar ,  Kanwaljit Singh

IPC: H01L29/66 ,  G06N10/00 ,  H01L21/8234 ,  H01L27/088 ,  H01L27/12 ,  H01L29/15 ,  H01L29/78 ,  H01L29/82 ,  H01L29/43

Abstract: Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include a (111) silicon substrate, a (111) germanium quantum well layer above the substrate, and a plurality of gates above the quantum well layer. In some embodiments, a quantum dot device may include a silicon substrate, an insulating material above the silicon substrate, a quantum well layer above the insulating material, and a plurality of gates above the quantum well layer.

公开(公告)号：US11158714B2

公开(公告)日：2021-10-26

申请号：US16307853

申请日：2016-06-09

Applicant: Intel Corporation

Inventor： Ravi Pillarisetty ,  Van H. Le ,  Jeanette M. Roberts ,  David J. Michalak ,  James S. Clarke ,  Zachary R. Yoscovits

IPC: H01L29/423 ,  H01L29/417 ,  H01L29/66 ,  H01L29/775 ,  H01L29/78 ,  H01L29/06 ,  H01L29/778 ,  H01L29/165

Abstract: Disclosed herein are quantum dot devices with trenched substrates, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a substrate having a trench disposed therein, wherein a bottom of the trench is provided by a first material, and a quantum well stack at least partially disposed in the trench. A material of the quantum well stack may be in contact with the bottom of the trench, and the material of the quantum well stack may be different from the first material.

公开(公告)号：US20210296480A1

公开(公告)日：2021-09-23

申请号：US17341559

申请日：2021-06-08

Applicant: Intel Corporation

Inventor： James S. Clarke ,  Nicole K. Thomas ,  Zachary R. Yoscovits ,  Hubert C. George ,  Jeanette M. Roberts ,  Ravi Pillarisetty

IPC: H01L29/775 ,  H01L29/66 ,  G06N10/00 ,  H01L29/12

Abstract: Quantum dot devices, and related systems and methods, are disclosed herein. In some embodiments, a quantum dot device may include a quantum well stack; a plurality of first gates above the quantum well stack; and a plurality of second gates above the quantum well stack; wherein the plurality of first gates are arranged in electrically continuous rows extending in a first direction, and the plurality of second gates are arranged in electrically continuous rows extending in a second direction perpendicular to the first direction.

公开(公告)号：US20200350423A1

公开(公告)日：2020-11-05

申请号：US16642886

申请日：2017-09-28

Applicant: Intel Corporation

Inventor： Ravi Pillarisetty ,  Van H. Le ,  Nicole K. Thomas ,  Hubert C. George ,  Jeanette Roberts ,  Payam Amin ,  Zachary R. Yoscovits ,  Roman Caudillo ,  James S. Clarke ,  Roza Kotlyar ,  Kanwaljit Singh

IPC: H01L29/66 ,  H01L29/82 ,  H01L29/78 ,  H01L27/088 ,  H01L27/12 ,  H01L21/8234 ,  H01L29/15 ,  G06N10/00

Abstract: Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include a (111) silicon substrate, a (111) germanium quantum well layer above the substrate, and a plurality of gates above the quantum well layer. In some embodiments, a quantum dot device may include a silicon substrate, an insulating material above the silicon substrate, a quantum well layer above the insulating material, and a plurality of gates above the quantum well layer.

公开(公告)号：US20200321436A1

公开(公告)日：2020-10-08

申请号：US16650299

申请日：2017-12-23

Applicant: Intel Corporation

Inventor： Ravi Pillarisetty ,  Hubert C. George ,  Nicole K. Thomas ,  Jeanette M. Roberts ,  Roman Caudillo ,  Zachary R. Yoscovits ,  Kanwaljit Singh ,  Roza Kotlyar ,  Patrick H. Keys ,  James S. Clarke

IPC: H01L29/15 ,  G06N10/00

Abstract: Quantum dot devices, and related systems and methods, are disclosed herein. In some embodiments, a quantum dot device may include a quantum well stack; a plurality of first gates above the quantum well stack; and a plurality of second gates above the quantum well stack; wherein the plurality of first gates are arranged in electrically continuous first rows and the plurality of second gates are arranged in electrically continuous second rows parallel to the first rows. Quantum dot devices according to various embodiments of the present disclosure are based on arranging first and second gates in hexagonal/honeycomb arrays.

公开(公告)号：US20200312990A1

公开(公告)日：2020-10-01

申请号：US16308089

申请日：2016-06-09

Applicant: Intel Corporation

Inventor： Jeanette M. Roberts ,  James S. Clarke ,  Ravi Pillarisetty ,  David J. Michalak ,  Zachary R. Yoscovits

IPC: H01L29/778 ,  H01L29/423 ,  H01L29/66 ,  H01L29/76 ,  H01L29/06 ,  H01L29/12

Abstract: Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a quantum well stack; a plurality of gates disposed on the quantum well stack; and a top gate at least partially disposed on the plurality of gates such that the plurality of gates are at least partially disposed between the top gate and the quantum well stack.