摘要:
The present invention relates to a memory cell comprising: a resistive structure; at least two electrodes coupled to the resistive structure, and at least one hydrogen reservoir structure, wherein the application of an electrical signal to one of the at least two electrodes causes the electrical resistance of the resistive structure to be modified by altering a hydrogen-ion concentration in the resistive structure.
摘要:
In one embodiment, the invention is a method and apparatus for fabricating sub-lithography data tracks for use in magnetic shift register memory devices. One embodiment of a memory device includes a first stack of dielectric material formed of a first dielectric material, a second stack of dielectric material surrounding the first stack of dielectric material and formed of at least a second dielectric material, and at least one data track for storing information, positioned between the first stack of dielectric material and the second stack of dielectric material, the data track having a high aspect ratio and a substantially rectangular cross section.
摘要:
A memory cell structure and method for forming the same. The method includes forming a via within a dielectric layer. The via is formed over the center of an electrically conducting bottom electrode. The method includes depositing a stress liner along at least one sidewall of the via. The stress liner imparting stress on material proximate the stress liner. In one embodiment, the stress liner provides a stress in the range of 500 to 5000 MPa on the material enclosed within its volume. The method includes depositing phase change material within the via and the volume enclosed by the stress liner. The method also includes forming an electrically conducting top electrode above the phase change material.
摘要:
A process for preparing a phase change memory semiconductor device comprising a (plurality of) nanoscale electrode(s) for alternately switching a chalcogenide phase change material from its high resistance (amorphous) state to its low resistance (crystalline) state, whereby a reduced amount of current is employed, and wherein the plurality of nanoscale electrodes, when present, have substantially the same dimensions.
摘要:
The present invention in one embodiment provides a method of forming an electrode that includes the steps of providing at least one metal stud in a layer of an interlevel dielectric material; forming a pillar of a first dielectric material atop the at least one metal stud; depositing an electrically conductive material atop the layer of the interlevel dielectric material and an exterior surface of the pillar, wherein a portion of the electrically conductive material is in electrical communication with the at least one metal stud; forming a layer of a second dielectric material atop the electrically conductive material and the substrate; and planarizing the layer of the second dielectric material to expose an upper surface of the electrically conductive material.
摘要:
An embodiment of the present invention includes a method of forming a nonvolatile phase change memory (PCM) cell. This method includes forming at least one bottom electrode; forming at least one phase change material layer on at least a portion of an upper surface of the bottom electrode; forming at least one heater layer on at least a portion of an upper surface of the phase change material layer; and shaping the heater layer into a tapered shape, such that an upper surface of the heater layer has a cross-sectional width that is longer than a cross-sectional width of a bottom surface of the heater layer contacting the phase change material layer.Another embodiment of the present invention includes a phase change memory (PCM) structure configurable for use as a nonvolatile storage element. The element includes at least one bottom electrode; at least one phase change material layer on at least a portion of an upper surface of the bottom electrode; and at least one heater layer on at least a portion of an upper surface of the phase change material layer, wherein the heater layer has a tapered shape such that an upper surface of the heater layer has a cross-sectional width that is longer than a cross-sectional width of a bottom surface of the heater layer contacting the phase change material layer.