Apparatus and methods for performing concurrent access operations on different groupings of memory cells

    公开(公告)号:US10957393B2

    公开(公告)日:2021-03-23

    申请号:US16454461

    申请日:2019-06-27

    Inventor: Luca De Santis

    Abstract: Method of operating a memory, and apparatus configured to perform similar methods, including performing a first access operation having a plurality of phases on a first grouping of memory cells, receiving a command to perform a second access operation having a plurality of phases on a second grouping of memory cells while performing a particular phase of the plurality of phases of the first access operation, pausing the first access operation in response to completion of the particular phase of the plurality of phases of the first access operation, performing an initial phase of the plurality of phases of the second access operation while the first access operation is paused, and performing a next subsequent phase of the plurality of phases of the first access operation and a next subsequent phase of the plurality of phases of the second access operation concurrently.

    APPARATUS FOR DETERMINING AN EXPECTED DATA AGE OF MEMORY CELLS

    公开(公告)号:US20200234777A1

    公开(公告)日:2020-07-23

    申请号:US16839304

    申请日:2020-04-03

    Inventor: Luca De Santis

    Abstract: Apparatus including an array of memory cells, a plurality of access lines each corresponding to a respective plurality of memory cells of the array of memory cells and each connected to a control gate of each memory cell of its respective plurality of memory cells; and a controller for access of the array of memory cells that is configured to cause the apparatus to apply a particular voltage level to a particular access line of the plurality of access lines, and determine a value indicative of a number of memory cells of the respective plurality of memory cells for the particular access line that are activated in response to applying the particular voltage level. The controller might further be configured to determine an expected data age of the respective plurality of memory cells, and/or determine a plurality of read voltages for reading the respective plurality of memory cells.

    APPARATUS AND METHODS FOR DETERMINING READ VOLTAGES FOR A READ OPERATION

    公开(公告)号:US20200152278A1

    公开(公告)日:2020-05-14

    申请号:US16745514

    申请日:2020-01-17

    Abstract: Methods of operating a memory, as well as memory configured to perform such method, include applying an intermediate read voltage to a selected access line for a read operation, adding noise to a sensing operation while applying the intermediate read voltage, determining a value indicative of a number of memory cells of a plurality of memory cells connected to the selected access line that are activated in response to applying the intermediate read voltage to the selected access line, and determining a plurality of read voltages for the read operation in response to the value indicative of the number of memory cells of the plurality of memory cells that are activated in response to applying the intermediate read voltage to the selected access line.

    Methods of operating a memory device comparing input data to data stored in memory cells coupled to a data line

    公开(公告)号:US10529430B2

    公开(公告)日:2020-01-07

    申请号:US16180154

    申请日:2018-11-05

    Abstract: Methods of operating a memory device include comparing input data to data stored in memory cells coupled to a data line, comparing a representation of a level of current in the data line to a reference, and determining that the input data potentially matches the data stored in the memory cells when the representation of the level of current in the data line is less than the reference. Methods of operating a memory device further include comparing input data to first data and to second data stored in memory cells coupled to a first data line or to a second data line, respectively, comparing representations of the levels of current in the first data line and in the second data line to a first reference and to a different second reference, and deeming one to be a closer match to the input data in response to results of the comparisons.

    Memory as a programmable logic device

    公开(公告)号:US10482972B2

    公开(公告)日:2019-11-19

    申请号:US16413708

    申请日:2019-05-16

    Abstract: Memories include a data line, a plurality of strings of series-connected memory cells selectively connected to the data line, a plurality of first access lines each coupled to a control gate of a respective memory cell of each string of series-connected memory cells of the plurality of strings of series-connected memory cells, and a plurality of second access lines each coupled to a control gate of a respective memory cell of a respective string of series-connected memory cells of the plurality of strings of series-connected memory cells.

    METHODS OF OPERATING A MEMORY DEVICE COMPARING INPUT DATA TO DATA STORED IN MEMORY CELLS COUPLED TO A DATA LINE

    公开(公告)号:US20190074069A1

    公开(公告)日:2019-03-07

    申请号:US16180154

    申请日:2018-11-05

    Abstract: Methods of operating a memory device include comparing input data to data stored in memory cells coupled to a data line, comparing a representation of a level of current in the data line to a reference, and determining that the input data potentially matches the data stored in the memory cells when the representation of the level of current in the data line is less than the reference. Methods of operating a memory device further include comparing input data to first data and to second data stored in memory cells coupled to a first data line or to a second data line, respectively, comparing representations of the levels of current in the first data line and in the second data line to a first reference and to a different second reference, and deeming one to be a closer match to the input data in response to results of the comparisons.

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